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PDF GS9092A Data sheet ( Hoja de datos )

Número de pieza GS9092A
Descripción GenLINX-R III 270Mb/s Serializer
Fabricantes Gennum Corporation 
Logotipo Gennum Corporation Logotipo



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GS9092A GenLINX® III
270Mb/s Serializer for SDI and DVB-ASI
GS9092A Data Sheet
Key Features
• SMPTE 259M-C compliant scrambling and NRZI to
NRZ encoding (with bypass)
• DVB-ASI sync word insertion and 8b/10b encoding
• Integrated Cable Driver
• Integrated line-based FIFO for data
alignment/delay, clock phase interchange, DVB-ASI
data packet insertion, and ancillary data packet
insertion
• User selectable additional processing features
including:
• ANC data checksum, and line number
calculation and insertion
• TRS and EDH packet generation and insertion
• illegal code remapping
• Enhanced Gennum Serial Peripheral Interface
(GSPI)
• JTAG test interface
• +1.8V internal cable driver and core power supply
• Optional +1.8V or +3.3V digital I/O power supply
• Small footprint (8mm x 8mm)
• Low power operation (typically 200mW)
• Pb-free and RoHS compliant
Applications
• SMPTE 259M-C Serial Digital Interfaces
• DVB-ASI Serial Digital Interfaces
Description
The GS9092A is a 270Mb/s serializer with an internal
FIFO and an integrated cable driver. It contains all the
necessary blocks to realize a transmit solution for
SD-SDI and DVB-ASI applications.
In addition to serializing the input data stream, the
GS9092A performs NRZI-to-NRZ encoding and
scrambling as per SMPTE 259M-C when operating in
SMPTE mode. When operating in DVB-ASI mode, the
device will insert K28.5 sync characters and 8b/10b
encode the data prior to serialization.
Parallel data inputs are provided for 10-bit multiplexed
formats at SD signal rates. A 27MHz parallel clock input
signal is also required.
The integrated cable driver features an adjustable
signal swing and common mode operating point offering
fully compliant SMPTE 259M-C cable driver
connectivity.
The GS9092A includes a range of data processing
functions such as automatic standards detection and
EDH support. The device can also insert TRS signals,
re-map illegal code words, and generate and insert
SMPTE 352M payload identifier packets. All processing
features are optional and may be enabled/disabled via
external control pin(s) and/or host interface
programming.
The GS9092A also incorporates a video line-based
FIFO. This FIFO may be used in four user-selectable
modes to carry out tasks such as data delay, clock
phase interchange, MPEG packet insertion and clock
rate interchange, and ancillary data packet insertion.
The device may also be used as a low-latency
parallel-to-serial converter where the SMPTE
scrambling block will be the only processing feature
enabled.
The GS9092A is Pb-free, and the encapsulation
compound does not contain halogenated flame
retardant (RoHS compliant).
34715 - 0 February 2006
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GS9092A pdf
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1. Pin Out
1.1 Pin Assignment
GS9092A Data Sheet
LF-
1 56 55 54 53 52 51 50 49 48 47 46 45
44 43 42
IO_GND
PLL_GND
2
41 DIN9 (INSYNCIN)
PLL_VDD
3
40 DIN8 (KIN)
CD_VDD
4
SDO
SDO
5
6
CD_GND
NC
RSET
7
8
9
VBG
10
SDO_EN
11
GS9092A
XXXXE3
YYWW
GENNUM
39 DIN7
38 DIN6
37 DIN5
36 DIN4
35 DIN3
34 DIN2
33 DIN1
32 DIN0
IOPROC_EN 12
31 WR_RESET
JTAG/HOST
13
30 WR_CLK
RESET
14
15
16
17 18
29
19 20 21 22 23 24 25 26 27 28
IO_VDD
Center Pad
(bottom of package)
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GS9092A arduino
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Table 1-1: Pin Descriptions (Continued)
Pin
Number
55
Name
VCO_GND
Timing
Analog
56 LF+
Analog
– Center Pad
GS9092A Data Sheet
Type Description
Input
Power
Input
Power
Ground connection for Voltage-Controlled-Oscillator. Connect to GND.
Loop filter component connection. Connect to LF- through a capacitor.
See Typical Application Circuit on page 56.
Connect to GND following recommendations in Recommended PCB
Footprint on page 58.
2. Electrical Characteristics
2.1 Absolute Maximum Ratings
Parameter
Supply Voltage Core
Supply Voltage I/O
Input Voltage Range (any input)
Ambient Operating Temperature
Storage Temperature
ESD protection on all pins (see Note 1)
NOTES:
1. HBM, per JESDA - 114B
Value/Units
-0.3V to +2.1V
-0.3V to +3.47V
-2.0V to +5.25V
-20°C < TA < 85°C
-40°C < TSTG < 125°C
500 V
34715 - 0 February 2006
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