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FAN3121のメーカーはFairchild Semiconductorです、この部品の機能は「(FAN3121 / FAN3122) Low-Side Gate Driver」です。 |
部品番号 | FAN3121 |
| |
部品説明 | (FAN3121 / FAN3122) Low-Side Gate Driver | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとFAN3121ダウンロード(pdfファイル)リンクがあります。 Total 21 pages
www.DataSheet4U.com
September 2008
FAN3121 / FAN3122
Single 9A High-Speed, Low-Side Gate Driver
Features
Industry-Standard Pin-out with Enable Input
4.5 to 18V Operating Range
11.4A Peak Sink at VDD = 12V
9.7A Sink / 7.1A Source at VOUT = 6V
Inverting Configuration (FAN3121) and
Non-Inverting Configuration (FAN3122)
Internal Resistors Turn Driver Off If No Inputs
23ns/19ns Typical Rise/Fall Times with 10nF Load
20ns Typical Propagation Delay Time
Choice of TTL or CMOS Input Thresholds
MillerDrive™ Technology
Available in Thermally Enhanced 3x3mm 8-Lead
MLP or 8-Lead SOIC Package (Pb-Free Finish)
Rated from –40°C to +125°C
Applications
Synchronous Rectifier Circuits
High-Efficiency MOSFET Switching
Switch-Mode Power Supplies
DC-to-DC Converters
Motor Control
Description
The FAN3121 and FAN3122 MOSFET drivers are
designed to drive N-channel enhancement MOSFETs in
low-side switching applications by providing high peak
current pulses. The drivers are available with either TTL
(FAN312xT) or CMOS (FAN312xC) input thresholds.
Internal circuitry provides an under-voltage lockout
function by holding the output low until the supply
voltage is within the operating range.
FAN312x drivers incorporate the MillerDrive™
architecture for the final output stage. This bipolar /
MOSFET combination provides the highest peak
current during the Miller plateau stage of the MOSFET
turn-on / turn-off process.
The FAN3121 and FAN3122 drivers implement an
enable function on pin 3 (EN), previously unused in the
industry-standard pin-out. The pin is internally pulled up
to VDD for active HIGH logic and can be left open for
standard operation.
The FAN3121/22 is available in a 3x3mm 8-lead thermally-
enhanced MLP package or an 8-lead SOIC package.
VDD 1
IN 2
EN 3
GND 4
8 VDD
7 OUT
6 OUT
5 GND
Figure 1. FAN3121 Pin Configuration
VDD 1
IN 2
EN 3
GND 4
8 VDD
7 OUT
6 OUT
5 GND
Figure 2. FAN3122 Pin Configuration
© 2008 Fairchild Semiconductor Corporation
FAN3121 / FAN3122 • Rev. 1.0.0
www.fairchildsemi.com
1 Page www.DataSheet4U.com
VDD 1
IN 2
EN 3
GND 4
8 VDD
7 OUT
6 OUT
5 GND
Figure 5. FAN3121 Pin Assignments (Repeated)
VDD 1
IN 2
EN 3
GND 4
8 VDD
7 OUT
6 OUT
5 GND
Figure 6. FAN3122 Pin Assignments (Repeated)
Pin Definitions
FAN3121 FAN3122
33
4, 5 4, 5
22
6, 7
6, 7
1, 8 1, 8
Name
EN
GND
IN
OUT
OUT
VDD
P1
Description
Enable Input. Pull pin LOW to inhibit driver. EN has logic thresholds for both
TTL and CMOS IN thresholds.
Ground. Common ground reference for input and output circuits.
Input.
Gate Drive Output. Held LOW unless required input is present and VDD is
above the UVLO threshold.
Gate Drive Output (inverted from the input). Held LOW unless required input
is present and VDD is above the UVLO threshold.
Supply Voltage. Provides power to the IC.
Thermal Pad (MLP only). Exposed metal on the bottom of the package; may
be left floating or connected to GND; NOT suitable for carrying current.
Output Logic
FAN3121
EN IN OUT
00
0 1(7)
1(7) 0
1(7) 1(7)
0
0
1
0
Note:
7. Default input signal if no external connection is made.
FAN3122
EN IN OUT
0 0(7) 0
01
1(7) 0(7)
1(7) 1
0
0
1
© 2008 Fairchild Semiconductor Corporation
FAN3121 / FAN3122 • Rev. 1.0.0
3
www.fairchildsemi.com
3Pages www.DataSheet4U.com
Electrical Characteristics
Unless otherwise noted, VDD=12V and TJ=-40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
Supply
VDD Operating Range
TTL
IDD Supply Current, Inputs / EN Not Connected CMOS(8)
VON Turn-On Voltage
VOFF Turn-Off Voltage
Inputs (FAN312xT)(9)
VIL_T INx Logic Low Threshold
VIH_T INx Logic High Threshold
IIN+ Non-Inverting Input Current
IIN- Inverting Input Current
VHYS_T TTL Logic Hysteresis Voltage
Inputs (FAN312xC)(9)
IN from 0 to VDD
IN from 0 to VDD
VIL_C
VIH_C
IIN+
IIN-
VHYS_C
INx Logic Low Threshold
INx Logic High Threshold
Non-Inverting Input Current
Inverting Input Current
CMOS Logic Hysteresis Voltage
IN from 0 to VDD
IN from 0 to VDD
ENABLE (FAN3121, FAN3122)
VENL
VENH
VHYS_T
RPU
tD1, tD2
tD1, tD2
Enable Logic Low Threshold
Enable Logic High Threshold
TTL Logic Hysteresis Voltage
Enable Pull-up Resistance
Propagation Delay, EN Rising(10)
Propagation Delay, EN Falling(10)
EN from 5V to 0V
EN from 0V to 5V
Output
ISINK OUT Current, Mid-Voltage, Sinking(11)
OUT at VDD/2, CLOAD=1.0µF,
f=1kHz
ISOURCE
IPK_SINK
IPK_SOURCE
tRISE
tFALL
tD1, tD2
tD1, tD2
IRVS
OUT Current, Mid-Voltage, Sourcing(11)
OUT Current, Peak, Sinking(11)
OUT Current, Peak, Sourcing(11)
Output Rise Time(10)
Output Fall Time(10)
Output Propagation Delay, CMOS Inputs(10)
Output Propagation Delay, TTL Inputs(10)
Output Reverse Current Withstand(11)
OUT at VDD/2, CLOAD=1.0µF,
f=1kHz
CLOAD=1.0µF, f=1kHz
CLOAD=1.0µF, f=1kHz
CLOAD=10nF
CLOAD=10nF
0 – 12VIN, 1V/ns Slew Rate
0 – 5VIN, 1V/ns Slew Rate
Notes:
8. Lower supply current due to inactive TTL circuitry.
9. EN inputs have modified TTL thresholds; refer to the ENABLE section.
10. See Timing Diagrams of Figure 8 and Figure 9.
11. Not tested in production.
4.5
3.5
3.30
0.8
-1
-175
0.40
30
-1
-175
12
1.2
1.8
0.2
68
8
14
18
11
9
9
1500
0.65
0.58
4.0
3.75
1.0
1.7
0.70
38
55
17
1.6
2.2
0.6
100
17
21
9.7
7.1
11.4
10.6
23
19
18
23
18.0 V
0.90 mA
0.85
4.3 V
4.10 V
V
2.0 V
175 µA
1 µA
0.85 V
%VDD
70 %VDD
175 µA
1 µA
24 %VDD
2.0 V
2.6 V
0.8 V
134 kΩ
27 ns
33 ns
A
A
A
A
29 ns
27 ns
28 ns
35 ns
mA
© 2008 Fairchild Semiconductor Corporation
FAN3121 / FAN3122 • Rev. 1.0.0
6
www.fairchildsemi.com
6 Page | |||
ページ | 合計 : 21 ページ | ||
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部品番号 | 部品説明 | メーカ |
FAN3121 | (FAN3121 / FAN3122) Low-Side Gate Driver | Fairchild Semiconductor |
FAN3122 | (FAN3121 / FAN3122) Low-Side Gate Driver | Fairchild Semiconductor |