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FAN3100 の電気的特性と機能

FAN3100のメーカーはFairchild Semiconductorです、この部品の機能は「Low-Side Gate Driver」です。


製品の詳細 ( Datasheet PDF )

部品番号 FAN3100
部品説明 Low-Side Gate Driver
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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FAN3100 Datasheet, FAN3100 PDF,ピン配置, 機能
www.DataSheet4U.com
April 2008
FAN3100
Single 2A High-Speed, Low-Side Gate Driver
Features
ƒ 3A Peak Sink/Source at VDD = 12V
ƒ 4.5 to 18V Operating Range
ƒ 2.5A Sink / 1.8A Source at VDD = 6V
ƒ Dual-Logic Inputs Allow Configuration as
Non-Inverting or Inverting with Enable Function
ƒ Internal Resistors Turn Driver Off If No Inputs
ƒ 13ns Typical Rise Time and 9ns Typical Fall-Time
with 1nF Load
ƒ Choice of TTL or CMOS Input Thresholds
ƒ MillerDrive™ Technology
ƒ Typical Propagation Delay Time Under 20ns with
Input Falling or Rising
ƒ 6-Lead 2x2mm MLP or 5-Pin SOT23 Packages
ƒ Rated from –40°C to 125°C Ambient
Applications
ƒ Switch-Mode Power Supplies
ƒ High-Efficiency MOSFET Switching
ƒ Synchronous Rectifier Circuits
ƒ DC-to-DC Converters
ƒ Motor Control
Description
The FAN3100 2A gate driver is designed to drive an N-
channel enhancement-mode MOSFET in low-side
switching applications by providing high peak current
pulses during the short switching intervals. The driver is
available with either TTL (FAN3100T) or CMOS
(FAN3100C) input thresholds. Internal circuitry provides
an under-voltage lockout function by holding the output
low until the supply voltage is within the operating
range. The FAN3100 delivers fast MOSFET switching
performance, which helps maximize efficiency in high-
frequency power converter designs.
FAN3100 drivers incorporate MillerDrive™ architecture
for the final output stage. This bipolar-MOSFET
combination provides high peak current during the
Miller plateau stage of the MOSFET turn-on / turn-off
process to minimize switching loss, while providing rail-
to-rail voltage swing and reverse current capability.
The FAN3100 also offers dual inputs that can be
configured to operate in non-inverting or inverting mode
and allow implementation of an enable function. If one
or both inputs are left unconnected, internal resistors
bias the inputs such that the output is pulled low to hold
the power MOSFET off.
The FAN3100 is available in a lead-free finish 2x2mm
6-lead Molded Leadless Package (MLP), for smallest
size with excellent thermal performance, or industry-
standard 5-pin SOT23.
Functional Pin Configurations
Figure 1. 2x2mm 6-Lead MLP (Top View)
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.1
Figure 2. SOT23-5 (Top View)
www.fairchildsemi.com

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FAN3100 pdf, ピン配列
www.DataSheet4U.com
Pin Definitions
SOT23 MLP
Pin # Pin #
13
2
2
31
46
54
Pad
5
Name
Pin Description
VDD Supply Voltage. Provides power to the IC.
AGND Analog ground for input signals (MLP only). Connect to PGND underneath the IC.
GND Ground (SOT-23 only). Common ground reference for input and output circuits.
IN+ Non-Inverting Input. Connect to VDD to enable output.
IN- Inverting Input. Connect to AGND or PGND to enable output.
OUT
Gate Drive Output: Held low unless required inputs are present and VDD is above
UVLO threshold.
P1
Thermal Pad (MLP only). Exposed metal on the bottom of the package which is
electrically connected to pin 5.
PGND
Power Ground (MLP only). For output drive circuit; separates switching noise from
inputs.
Output Logic
IN+ INOUT
0(7) 0
0
0(7) 1(7)
0
101
1 1(7) 0
Note:
7. Default input signal if no external connection is made.
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.1
3
www.fairchildsemi.com


3Pages


FAN3100 電子部品, 半導体
www.DataSheet4U.com
Electrical Characteristics
Unless otherwise noted, VDD = 12V, TJ = -40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
Symbol
Parameter
Conditions
Supply
VDD Operating Range
IDD
Supply Current
Inputs/EN Not Connected
FAN3100C(8)
FAN3100T
VON Turn-On Voltage
VOFF
Turn-Off Voltage
Inputs (FAN3100T)
VINL_T IN+, IN- Logic Low Voltage, Maximum
VINH_T IN+, IN- Logic High Voltage, Minimum
IIN+ Non-inverting Input
IIN- Inverting Input
VHYS
IN+, IN- Logic Hysteresis Voltage
Inputs (FAN3100C)
IN from 0 to VDD
IN from 0 to VDD
VINL_C
VINH_C
IINL
IINH
VHYS_C
Output
IN+, IN- Logic Low Voltage
IN+, IN- Logic High Voltage
IN Current, Low
IN Current, High
IN+, IN- Logic Hysteresis Voltage
IN from 0 to VDD
IN from 0 to VDD
ISINK
OUT Current, Mid-Voltage, Sinking(9)
OUT at VDD/2,
CLOAD = 0.1µF, f = 1kHz
ISOURCE OUT Current, Mid-Voltage, Sourcing(9)
IPK_SINK
IPK_SOURCE
tRISE
tFALL
tD1, tD2
tD1, tD2
IRVS
OUT Current, Peak, Sinking(9)
OUT Current, Peak, Sourcing(9)
Output Rise Time(10)
Output Fall Time(10)
Output Prop. Delay, CMOS Inputs(10)
Output Prop. Delay, TTL Inputs(10)
Output Reverse Current Withstand(9)
OUT at VDD/2,
CLOAD = 0.1µF, f = 1kHz
CLOAD = 0.1µF, f = 1kHz
CLOAD = 0.1µF, f = 1kHz
CLOAD = 1000pF
CLOAD = 1000pF
0 - 12VIN; 1V/ns Slew Rate
0 - 5VIN; 1V/ns Slew Rate
Note:
8. Lower supply current due to inactive TTL circuitry.
9. Not tested in production.
10. See Timing Diagrams of Figure 7 and Figure 8.
Min. Typ. Max. Unit
4.5 18.0 V
0.20 0.35 mA
0.5 0.8 mA
3.5 3.9 4.3
V
3.3 3.7 4.1
V
0.8
2.0
-1 175
-175
1
0.2 0.4 0.8
V
V
µA
µA
V
30 %VDD
70 %VDD
-1 175 µA
-175
1 µA
17 %VDD
2.5 A
-1.8 A
3A
-3 A
13 20 ns
9 14 ns
7 15 28 ns
9 16 30 ns
500 mA
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.1
6
www.fairchildsemi.com

6 Page



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部品番号部品説明メーカ
FAN3100

Low-Side Gate Driver

Fairchild Semiconductor
Fairchild Semiconductor


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