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PDF FAN2564 Data sheet ( Hoja de datos )
| Número de pieza | FAN2564 | |
| Descripción | 300mA Low Vin LDO | |
| Fabricantes | Fairchild Semiconductor | |
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April 2011
FAN2564
300mA Low VIN LDO for Digital Applications
Features
Input Voltage 1.65V to 3.6V
Guaranteed 300mA Output
High Initial Output Voltage Accuracy: ±1%
Fixed Output Voltage options from 1.2V to 2.8V
Very Low Dropout: 100mV at 300mA
45µA Quiescent Current at No Load
Low Output Noise of 100µVRMS
Inrush Current Controlled to Less Than 500mA
PSRR of 60dB at 1kHz
100µs Startup Time
Stable with Ceramic Capacitors
Thermal and Short-Circuit Protection
4-bump WLCSP, 0.5mm Pitch
6-pin 2 x 2mm UMLP
Applications
Post Regulator
Cell Phones and Smart Phones
WLAN, 3G, and 4G Data Cards
PMP and MP3 Players
Description
The FAN2564 operates from a minimum input of 1.65V
and provides outputs as low as 1.2V. Output current is
guaranteed to 300mA, making this regulator ideal for
digital loads.
The unique low input voltage capability and very low
dropout make this device an ideal post regulator to a
synchronous buck regulator. In this configuration, accu-
rate low voltage regulation is provided without the ineffi-
ciencies typically related to linear regulators.
The enable pin can be used to initiate shutdown mode,
where the operating current falls to an extremely low
10nA, typically.
The FAN2564 is designed to be stable with space-
saving ceramic capacitors as small as 0402 case size.
The FAN2564 is available in 4-bump 0.5mm pitch wafer-
level chip-scale package (WLCSP) and a 6-lead 2 x
2mm ultra-thin molded leadless package (UMLP).
Typical Application Circuit
© 2007 Fairchild Semiconductor Corporation
FAN2564 • Rev. 1.0.2
Figure 1. Typical Application Circuit
www.fairchildsemi.com
1 page  
Electrical Characteristics
VIN(3)=VOUT + 0.5V or 1.8V (whichever is higher). TA=-40°C to +85°C, test circuit is Figure 1, typical values are at
TA=25°C, ILOAD=1 mA, VEN=VIN, unless otherwise noted.
Symbol
Parameter
Conditions
Min. Typ. Max. Units
Power Supplies
VIN Input Voltage Range
IGND
ISD
V(EN)
Ground Current
Shutdown Supply Current
Enable High-level Input Voltage
Enable Low-level Input Voltage
ILOAD=0mA
ILOAD=300mA
VIN=3.6V, EN=GND
EN=GND
I(EN)
Enable Input Leakage Current
EN=VIN=3.6V
Regulation
IOUT Minimum Output Current
IOUT Maximum Output Current
VDO Dropout Voltage(4)
∆VOUT Output Voltage Accuracy
ILOAD=300mA
1.8V, 2.5V
1.2V, 1.3V, 1.5V
1.2V, 1.3V, 1.5V,
1.8V, 2.5V
Over Full VIN,
IOUT, at Room
Temperature
Over Full VIN,
IOUT, Tempera-
ture Range
∆VOUTline Line Regulation
VIN=VOUT(NOM) + 0.5V to 3.6V,
IOUT=1mA
∆VOUTload
ISCP
ISU
Load Regulation
Short-circuit Current Limit
Start-up Peak Current
IOUT=1mA to 300mA
EN Transition, LOW to HIGH
1.65 3.60
45 75
140 200
0.01 1.00
0.95
0.4
0
2.5 4.0
V
A
A
A
V
A
0 mA
300 mA
100 160 mV
-1.0 1.0
-1.5 1.5
%
-2.5 2.5
0.03 0.50 %/V
10 60 µV/mA
500 900 mA
500 900 mA
tON Turn-on Time(5)
EN Transition, LOW to HIGH
100 µs
Startup Overshoot(5)
IOUT=1mA
0%
TSD Thermal Shutdown
Rising Temperature
Hysteresis
+160
+30
°C
°C
PSRR
en
Power Supply Rejection Ratio(5) f=1kHz
Output Noise Voltage(5)
10Hz to 100kHz
60 dB
100 µVRMS
Timing Characteristics
Peak
∆VOUTline
Peak
∆VOUTload
Line Transient Response(5)
Load Transient Response(5)
600mV, tRISE=tFALL=30µs
1mA-300mA-1mA, tRISE=tFALL=1µs
±6 mV
±50 mV
Note:
3. VIN voltage tolerance +/- 5%.
4. Dropout voltage is the minimum input to output differential voltage needed to maintain VOUT to within 5% of no-
minal value. This parameter is only specified for output voltages greater than or equal to 1.8V.
5. This electrical specification is guaranteed by design.
© 2007 Fairchild Semiconductor Corporation
FAN2564 • Rev. 1.0.2
5
www.fairchildsemi.com
5 Page 
Physical Dimensions
0.03 C
2X
E
AF
B
PIN A1 AREA
TOP VIEW
D
0.03 C
2X
0.05 C
0.06 C
0.625
0.539
0.50 (Ø0.250)
Cu Pad
0.50
(Ø0.350)
Solder Mask
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
0.332±0.018
0.250±0.025
C
D
SEATING PLANE
SIDE VIEWS
0.50
0.50
12
0.005 C A B
Ø0.315±0.025
4X
B (Y)±0.018
A
F
(X)±0.018
BOTTOM VIEW
NOTES:
A. NO JEDEC REGISTRATION APPLIES.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. DATUM C IS DEFINED BY THE SPHERICAL
CROWNS OF THE BALLS.
E. PACKAGE NOMINAL HEIGHT IS 582 MICRONS
±43 MICRONS (539-625 MICRONS).
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
G. DRAWING FILENAME: MKT-UC004ABrev2.
Figure 26. 4-Bump, Wafer-Level Chip-Scale Package (WLCSP), 0.5mm Pitch
Product Specific Dimensions
Product
FAN2564UCX
D
1.41 +/-0.030
E
0.93 +/-0.030
X
0.215
Y
0.455
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, spe-
cifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2007 Fairchild Semiconductor Corporation
FAN2564 • Rev. 1.0.2
11
www.fairchildsemi.com
11 Page | ||
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| PDF Descargar | [ Datasheet FAN2564.PDF ] | |
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