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PDF FAN2103 Data sheet ( Hoja de datos )
| Número de pieza | FAN2103 | |
| Descripción | 24V Input Integrated Synchronous Buck Regulator | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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December 2007
www.datasheet4u.com
FAN2103 — TinyBuck™
3A, 24V Input Integrated Synchronous Buck Regulator
Features
Over 95% efficiency
Internal power MOSFETs:
High-side RDS(ON) = 31mΩ
Low-side RDS(ON) = 23mΩ
Integrated low-side Schottky diode
Programmable frequency operation up to 750KHz
Power-good signal
Wide input range: 3.0V to 24V
Output voltage range: 0.8V to 90%VIN
Input under-voltage lockout (UVLO)
Programmable over-current protection
Under-voltage, over-voltage, and thermal protection
Selectable light-load power-saving mode
5x6mm, 25-pin, 3-pad MLP
Applications
Thin and light Notebook PCs
Graphics cards
Battery-powered equipment
Set-top box
Point-of-load regulation
Description
The FAN2103 TinyBuck™ is an easy-to-use, cost- and
space-efficient, synchronous buck solution. It enables
designers to solve high-current requirements in a small
area with minimal external components.
External programming of clock frequency, current limit,
and loop response allows for optimization and flexibility
selecting output filter components and transient response.
The summing current mode modulator uses lossless
current sensing for current feedback and over-current,
and includes voltage feedforward.
Fairchild’s advanced BiCMOS power process,
combined with a thermally efficient MLP package,
provides low-RDS(ON), internal MOSFETs, and the ability
to dissipate high power in a small package.
Under-voltage, thermal shutdown, and power-good are
blanked at start-up, but protect the device from damage
during fault conditions.
Related Application Notes
AN-5067 – PCB land pattern design and surface
mount guidelines for MLP packages
Ordering Information
Part Number
FAN2103MPX
FAN2103EMPX
Operating
Temperature Range
-10°C to 85°C
-40°C to 85°C
Package
Packing Method
25-Pin Molded Leadless Package (MLP) 5x6mm Tape and Reel
25-Pin Molded Leadless Package (MLP) 5x6mm Tape and Reel
All packages are lead free per JEDEC: J-STD-020B standard.
© 2007 Fairchild Semiconductor Corporation
FAN2103 Rev. 1.0.3
www.fairchildsemi.com
1 page  
Electrical Specifications
Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted.
Parameter
Conditions
Min.
Power Supplies
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VCC Current
VCC UVLO Threshold
SW = Open, FB = 0.7V, VCC = 5V,
FSW = 600KHz
Shutdown: EN = 0, VCC = 5V
Power Saving Mode, VCC = 5V, FMIN
Rising VCC
Hysteresis
4.1
Power Output Section
N-Channel (Q1) RDS(ON)
N-Channel (Q2) RDS(ON)
Oscillator
Frequency
Minimum On-Time(2)
Ramp Amplitude, pk–pk
Minimum Off-Time(2)
VCC = 5V, 25°C
RT = 50KΩ
RT = 24KΩ
16VIN, 1.8VOUT, RT = 30KΩ,
RRAMP = 200KΩ
255
540
Reference
Reference Voltage (VFB)
FAN2103M,
FAN2103EM
FAN2103M, 25°C
FAN2103EM, 25°C
Temp. Coefficient (-10 to +85°C)
Temp. Coefficient (-40 to +85°C)
794
795
Error Amplifier
DC Gain(2)
Gain Bandwidth Product(2)
Output Voltage (VCOMP)
Output Current, Sourcing
Output Current, Sinking
FB Bias Current
VCC = 5V
VCC = 5V, VCOMP = 2.2V
VCC = 5V, VCOMP = 1.2V
VFB = 0.8V, 25°C
80
12
0.4
1.5
0.8
-850
Protection and Shutdown
Current Limit
ILIM Current
Over-Temperature Shutdown
Over-Temperature Hysteresis
RILIM open
25°C, VCC = 5V
Internal Temperature
3.8
9
Over-Voltage Threshold
2 Consecutive Clock Cycles
110
Under-Voltage Shutdown
16 Consecutive Clock Cycles
68
Fault Discharge Threshold
Measured at FB Pin
Fault Discharge Hysteresis
Measured at FB Pin (VFB ~500mV)
Note:
2. Specifications guaranteed by design and characterization; not production tested.
Typ. Max. Unit
8 12 mA
7 10 µA
2.2 4.5 mA
4.3 4.5 V
300 mV
31 35 mΩ
23 25 mΩ
300
600
50
0.53
100
345 KHz
660 KHz
65 ns
V
150 ns
800 806 mV
800 805 mV
50 PPM
70 PPM
85
15
2.2
1.2
-650
3.2
-450
dB
MHz
V
mA
mA
nA
5.0 7.0 A
10 11 µA
160 °C
30 °C
115 120 %VOUT
73 78 %VOUT
250 mV
250 mV
© 2007 Fairchild Semiconductor Corporation
FAN2103 Rev. 1.0.3
5
www.fairchildsemi.com
5 Page 
Setting the Ramp Resistor Value
The internal ramp voltage excursion (ΔVRAMP) during tON
should be set to 0.6V. RRAMP is approximately:
RRAMP(KΩ)
=
(VIN − 1.8) • VOUT
18x10−6 • VIN • F
−2
www.datasheet4u.com
where frequency (F) is expressed in KHz.
(7)
Setting the Current Limit
There are two levels of current limit thresholds in
FAN2103. The first level of protection is through an
internal default limit set at the factory to limit output
current beyond normal usage levels. The second level
of protection is a flexible one to be set externally by the
user. Current limit protection is enabled whenever the
lower of the two thresholds is reached. The FAN2103
uses its internal low-side MOSFET as the current-
sensing element. The current-limit threshold voltage
(VILIM) is compared to the voltage drop across the low-
side MOSFET, sampled at the end of each PWM off-
time/cycle. The internal default threshold (with ILIM open)
is temperature compensated.
The 10µA current sourced from the ILIM pin can be
used to establish a lower, temperature–dependent,
current-limit threshold by connecting an external
resistor (RILIM) to AGND:
RILIM(KΩ)
= 10.4
• KT
•
(IOUT
−
ΔIL
2
)
+ 142.5
(8)
where:
IOUT = desired current limit set point in Amps,
KT = the normalized temperature coefficient of the
low-side MOSFET (Q2) from Figure 8.
After 16 consecutive, pulse-by-pulse, current-limit
cycles, the fault latch is set and the regulator shuts
down. Cycling VCC or EN restores operation after a
normal soft-start cycle (refer to Auto-Restart section).
The over-current protection fault latch is active during
the soft-start cycle. Use a 1% resistor for RILIM.
Loop Compensation
The loop is compensated using a feedback network
around the error amplifier. Figure 22 shows a complete
Type-3 compensation network. Type-2 compensation
eliminates R3 and C3.
Figure 22. Compensation Network
Because the FAN2103 employs summing current-mode
architecture, Type-2 compensation can be used for
many applications. For applications that require wide
loop bandwidth and/or use very low-ESR output
capacitors, Type-3 compensation may be required.
RRAMP provides feedforward compensation for changes
in VIN. With a fixed RRAMP value, the modulator gain
increases as VIN is reduced, which could make it difficult
to compensate the loop. For designs with low input
voltages (3V to 6.5V), it is recommended that separate
RRAMP and the compensation component values are
used as compared to designs with VIN between 6.5V
and 24V.
Protection
The converter output is monitored and protected
against extreme overload, short-circuit, over-voltage,
and under-voltage conditions.
An internal “Fault Latch” is set for any fault intended to
shut down the IC. When the fault latch is set, the IC
discharges VOUT by enhancing the low-side MOSFET
until FB<0.25V. The MOSFET is not turned on again
unless FB>0.5V. This behavior discharges the output
without causing undershoot (negative output voltage).
0.25/0.5V
FB
FAULT
PWM LATCH
PWM GATE
DRIVE
Figure 23. Latched Fault Response
Under-Voltage Shutdown
If FB remains below the under-voltage threshold for 16
consecutive clock cycles, the fault latch is set and the
converter shuts down. This fault is prevented from
setting the fault latch during soft-start.
Over-Voltage Protection / Shutdown
If FB exceeds 115% • VREF for two consecutive clock
cycles, the fault latch is set and shutdown occurs.
A shorted high-side MOSFET condition is detected
when SW voltage exceeds ~0.7V while the low-side
MOSFET is fully enhanced. The fault latch is set
immediately upon detection.
These two fault conditions are allowed to set the fault
latch at any time, including during soft-start.
Auto-Restart
After a fault, EN is discharged with 1µA to a 1.1V
threshold before the 800KΩ pull-up is restored. A new
soft-start cycle begins when EN charges above 1.35V.
Depending on the external circuit, the FAN2103 can be
provisioned to remain latched-off or automatically
restart after a fault.
© 2007 Fairchild Semiconductor Corporation
FAN2103 Rev. 1.0.3
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet FAN2103.PDF ] | |
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