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PDF ASM3P2853A Data sheet ( Hoja de datos )
| Número de pieza | ASM3P2853A | |
| Descripción | Peak EMI Reducing Solution | |
| Fabricantes | Alliance Semiconductor Corporation | |
| Logotipo |  |
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December 2004
wrwewv.D0a.ta7Sheet4U.com
ASM3P2853A
Peak EMI Reducing Solution
Features
Generates an EMI optimized clock signal at
output.
Input frequency: 25 MHz.
Frequency outputs:
o USB Clock (48 MHz unmodulated)
o 50 MHz (modulated), ±1% centre spread
Modulation rate: 39 KHz.
Spread Spectrum ON/OFF control
Supply voltage range 2.5V ± 5%.
Available in 8-pin SOIC package.
Commercial Temperature range.
Product Description
The ASM3P2853A is a versatile spread spectrum
frequency modulator. The ASM3P2853A reduces
electromagnetic interference (EMI) at the clock source.
The ASM3P2853A allows significant system cost savings
by reducing the number of circuit board layers and
shielding that are required to pass EMI regulations. The
ASM3P2853A modulates the output of PLL in order to
spread the bandwidth of a synthesized clock, thereby
decreasing the peak amplitudes of its harmonics. This
results in significantly lower system EMI compared to the
typical narrow band signal produced by oscillators and
most clock generators. Lowering EMI by increasing a
signal’s bandwidth is called spread spectrum clock
generation.
Applications
ASM3P2853A is targeted towards EMI management for
high speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
systems.
Block Diagram
VDD
PWDNB
XIN
XOUT
SSONB
Crystal
Oscillator
VSS
PLL1
PLL2
USB Clock
(48 MHz
Unmodulated)
50 MHz
Modulated
Alliance Semiconductor
2575 Augustine Drive • Santa Clara CA • Tel: 408-855-4900 • Fax: 408-855-4999 • www.alsc.com
1 page  
December 2004
wrwewv.D0a.ta7Sheet4U.com
AC Electrical Characteristics
Parameter
Rise Time*
Symbol
tr
Conditions/ Description
Measured from 20% to 80% of the signal
level
Min
-
Fall Time*
Measured from 80% to 20% of the signal
tf level
-
Jitter
(Cycle to
Cycle)
tjc
Jitter
(Period)
tp
Clock Duty
Cycle
Ratio of pulse width (as measured from
td rising edge to next falling edge at VDD/2) to
one clock period
* CL = 15 pF, Input clock frequency = 25 MHz
-
-
45
ASM3P2853A
Typ Max Unit
2 - nS
1.2 -
nS
- 200
175 -
50 55
pS
pS
%
Peak EMI Reducing Solution
5 of 8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet ASM3P2853A.PDF ] | |
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