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PDF S1D2512X01 Data sheet ( Hoja de datos )
| Número de pieza | S1D2512X01 | |
| Descripción | DEFLECTION PROCESSOR | |
| Fabricantes | Samsung semiconductor | |
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www.DataSheet4U.com
JUL. 2000
Ver 0.3
DATA SHEET
S1D2512X01
Preliminary
1 page  
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
S1D2512X01
PIN DESCRIPTION
No
1
2
3
4
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6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Pin Name
H/HVIN
VSYNCIN
HLOCKOUT
PLL2C
C0
R0
PLL1F
HPOSITION
HMOIRE
FOCUSOUT
HGND
HFLY
HREF
COMP
REGIN
ISENSE
B+GND
BREATH
VGND
VAGCCAP
VREF
VCAP
VOUT
24 EWOUT
25 XRAY
26 HOUT
27 GND
28 BOUT
29 Vcc
30 SCL
31 SDA
32 5V
Table 1. Pin Description
Description
TTL compatible horizontal sync input (separate or composite)
TTL compatible vertical sync input (for separated H&V)
First PLL lock/unlock output (0V unlocked - 5V locked)
Second PLL loop filter
Horizontal oscillator capacitor
Horizontal oscillator resistor
First PLL loop filter
Horizontal position filter (capacitor to be connected to HGND)
Horizontal moire output (to be connected to PLL2 C through a resistor divider)
Vertical dynamic focus output
Horizontal section ground
Horizontal Flyback input (positive polarity)
Horizontal section reference voltage (to be filtered)
B+ error amplifier output for frequency compensation and gain setting
Regulation input of B+ control loop
Sensing of external B+ switching transistor current
Ground (related to B+ reference adjustment)
DC breathing input control (compensation of vertical amplitude against EHV
variation)
Vertical section ground
Memory capacitor for automatic gain control loop in vertical ramp generator
Vertical section reference voltage (to be filtered)
Vertical sawtooth generator capacitor
Vertical ramp output
(with frequency independent amplitude and S or C corrections if any).
It is mixed with vertical position voltage and vertical moire.
Pincushion-East/West correction parabola output
X-RAY protection input (with internal latch function)
Horizontal drive output (internal transistor, open collector)
General ground (referenced to Vcc)
B+ PWM regulator output
Supply voltage (12V typ)
I2C clock input
I2C data input
Supply voltage (5V typ)
4
5 Page 
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
S1D2512X01
Table 9. Horizontal Section Electrical Characteristics (Continued)
Parameter
Max. sourced current on VREF-H
Max. sourced current on VREF-V
1st PLL SECTION
Polarity integration delay
VCO control voltage (pin 7)
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VCO gain (pin 7)
Horizontal phase adjustment (see 11)
Horizontal phase setting value (Pin 8)
(see 11)
Minimum current value
Typical value
Maximum value
PLL1 filter current charge
Free running frequency
Free running frequency thermal drift (no
drift on external components) (see 7)
Free running frequency adjustment
Minimum value
Maximum value
PLL1 capture range
Symbol
IREF-H
IREF-V
Conditions
Pin 13
Pin 21
HpoIT
VVCO
VCOG
Hph
Pin 1
VREF-H = 8V
fo
fH (Max.)
Ro = 6.49KΩ,
Co = 820pF,
dF/dV = 1/11RoCo
% of horizontal period
Sub-address 01
Hphmin
Hphtyp
Hphmax
IPII1U
IPII1L
fo
dF0/dT
Byte x 1111111
Byte x 1000000
Byte x 0000000
PLL1 is unlocked
PLL1 is locked
Ro = 6.49KΩ,
Co = 820pF,
fo = 0.97/8RoCo
fo(Min.)
fo(Max.)
CR
Sub-address 02
Byte x x x 11111
Byte x x x 00000
Ro = 6.49KΩ,
Co = 820pF,
from fo + 0.5kHz to
4.5Fo (fo:22.8kHz)
fH (min.)
fH (max.)
Safe forced frequency
SF1 Byte 11 x x x x x x
SF2 Byte 10 x x x x x x
SFF Sub-address 02
2ND PLL SECTION HORIZONTAL OUTPUT SECTION
Flyback input threshold
voltage (pin12)
FBth
Horizontal jitter
Hjit At 31.4kHz
Min Typ
0.75
1.3
6.2
17
±10
2.8
3.4
4.0
±140
±1
22.8
-150
0.8
1.3
100
2F0
3F0
0.65 0.75
70
Max
5
5
23.5
Unit
mA
mA
ms
V
V
kHz/V
%
V
V
V
µA
mA
kHz
ppm/c
Fo
Fo
kHz
kHz
V
ppm
10
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S1D2512X01.PDF ] | |
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