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TMP19A43CD の電気的特性と機能

TMP19A43CDのメーカーはToshiba Semiconductorです、この部品の機能は「32-bit RISC Microprocessor」です。


製品の詳細 ( Datasheet PDF )

部品番号 TMP19A43CD
部品説明 32-bit RISC Microprocessor
メーカ Toshiba Semiconductor
ロゴ Toshiba Semiconductor ロゴ 




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TMP19A43CD Datasheet, TMP19A43CD PDF,ピン配置, 機能
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32bit TX System RISC
TX19A Family
TMP19A43CD/CZXBG
Rev2.0 2007.Aug.31

1 Page





TMP19A43CD pdf, ピン配列
TMP19A43
(1)TX19A processor core
1) Improved code efficiency and operating performance have been realized through the use of two ISA
(Instruction Set Architecture) modes - 16- and 32-bit ISA modes.
The 16-bit ISA mode instructions are compatible with the MIPS16TMASE instructions of superior
code efficiency at the object level.
The 32-bit ISA mode instructions are compatible with the TX39 instructions of superior operating
performance at the object level.
2) Both high performance and low power dissipation have been achieved.
z High performance
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Almost all instructions can be executed with one clock.
High performance is possible via a three-operand operation instruction.
5-stage pipeline
Built-in high-speed memory
DSP function: A 32-bit multiplication and accumulation operation can be executed with one clock.
z Low power dissipation
Optimized design using a low power dissipation library
Standby function that stops the operation of the processor core
3) High-speed interrupt response suitable for real-time control
Independency of the entry address
Automatic generation of factor-specific vector addresses
Automatic update of interrupt mask levels
(2) Internal program memory and data memory
Product name
Built-in ROM
Built-in RAM
TMP19A43CZXBG
384Kbyte
20Kbyte
TMP19A43CDXBG
512Kbyte
24Kbyte
TMP19A43FZXBG
384Kbyte (Flash)
20Kbyte
TMP19A43FDXBG
512Kbyte (Flash)
24Kbyte
ROM correction function: 1 word × 8 blocks, 8 words × 4 blocks
(3) External memory expansion
Expandable to 16 megabytes (for both programs and data)
External data bus:
Separate bus/multiplexed bus
Chip select/wait controller
: Coexistence of 8- and 16-bit widths is possible.
: 4 channels
(4) DMA controller
: 8 channels (2 interrupt factors)
Activated by an interrupt or software
Data to be transferred to internal memory, internal I/O, external memory, and external I/O
(5) 16-bit timer
: 16 channels
16-bit interval timer mode
16-bit event counter mode
16-bit PPG output (every 4 channels, synchronous outputs are possible)
Input capture function
2-phase pulse input counter function (4 channels assigned to perform this function): Multiplication-
by-4 mode
TMP19A43 (rev2.0) 1-2
Overview and Features


3Pages


TMP19A43CD 電子部品, 半導体
TMP19A43
2. Pin Layout and Pin Functions
This section shows the pin layout of TMP19A43 and describes the names and functions of input and output pins.
2.1 Pin Layout (Top view)
Fig. 2-1 Pin Layout Diagram (P-FBGA193) shows the pin layout of TMP19A43.
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17
C1 C2
C16 C17
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D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14
D16 D17
E1 E2
E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14
E16 E17
F1 F2
F4 F5 F6
F13 F14
F16 F17
G1 G2
G4 G5
G13 G14
G16 G17
H1 H2
H4 H5
H13 H14
H16 H17
J1 J2
J4 J5
J13 J14
J16 J17
K1 K2
K4 K5
K13 K14
K16 K17
L1 L2
L4 L5
L13 L14
L16 L17
M1 M2
M4 M5
M13 M14
M16 M17
N1 N2
N4 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14
N16 N17
P1 P2
P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14
P16 P17
R1 R2
R16 R17
T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17
U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17
Fig. 2-1 Pin Layout Diagram (P-FBGA193)
TMP19A43 (rev2.0) 2-1
Pin Layout and Pin Functions

6 Page



ページ 合計 : 70 ページ
 
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[ TMP19A43CD データシート.PDF ]


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共有リンク

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部品番号部品説明メーカ
TMP19A43CD

32-bit RISC Microprocessor

Toshiba Semiconductor
Toshiba Semiconductor
TMP19A43CZXBG

32-bit RISC Microprocessor

Toshiba Semiconductor
Toshiba Semiconductor


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