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PDF MTW32N20E Data sheet ( Hoja de datos )
| Número de pieza | MTW32N20E | |
| Descripción | TMOS POWER FET | |
| Fabricantes | Motorola Semiconductors | |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTW32N20E/D
Designer's
™ Data Sheet
TMOS E-FET .™
Power Field Effect Transistor
TO-247 with Isolated Mounting Hole
N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS E–FET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
www.DataSheet4cUo.nctormols, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Isolated Mounting Hole
G
®
D
S
MTW32N20E
Motorola Preferred Device
TMOS POWER FET
32 AMPERES
200 VOLTS
RDS(on) = 0.075 OHM
CASE 340K–01, Style 1
TO–247AE
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
VDSS
VDGR
VGS
ID
ID
IDM
PD
200 Vdc
200 Vdc
± 20 Vdc
32 Adc
19
128 Apk
180 Watts
1.44 W/°C
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 50 Vdc, VGS = 10 Vpk, IL = 32 Apk, L = 1.58 mH, RG = 25 Ω )
TJ, Tstg
EAS
– 55 to 150
810
°C
mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
RθJC
RθJA
TL
0.7 °C/W
40
260 °C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Sil Pad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
©MMoottoororolal,aInTc.M19O9S6 Power MOSFET Transistor Device Data
1
1 page  
20
16
VDS
TJ = 25°C
ID = 32 A
VDS = 160 V
200
180
160
140
12
QT
120
100
8
Q1
Q2
80
VGS 60
4 40
20
0 Q3
0
0 10 20 30 40 50 60 70 80 90 100
QT, TOTAL CHARGE (nC)
Figure 8. Gate–To–Source and Drain–To–Source
www.DataSheet4U.com
Voltage versus Total Charge
1000
TJ = 25°C
ID = 32 A
200 VDD = 100 V
100 VGS = 10 V
20
10
MTW32N20E
td(off)
tr
tf
td(on)
2
1
12
10 20
RG, GATE RESISTANCE (OHMS)
100
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
30 TJ = 25°C
VGS = 0 V
20
10
0
0 0.2 0.4 0.6 0.8
1
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the
maximum simultaneous drain–to–source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction tem-
perature and a case temperature (TC) of 25°C. Peak repetitive
pulsed power limits are determined by using the thermal re-
sponse data in conjunction with the procedures discussed in
AN569, “Transient Thermal Resistance–General Data and Its
Use.”
Switching between the off–state and the on–state may tra-
verse any load line provided neither rated peak current (IDM)
nor rated voltage (VDSS) is exceeded and the transition time
(tr,tf) do not exceed 10µs. In addition the total power averaged
over a complete switching cycle must not exceed (TJ(MAX) –
TC)/(RθJC).
A Power MOSFET designated E–FET can be safely used in
switching circuits with unclamped inductive loads. For reliable
operation, the stored energy from circuit inductance dissi-
pated in the transistor while in avalanche must be less than
the rated limit and adjusted for operating conditions differing
from those specified. Although industry practice is to rate in
terms of energy, avalanche energy capability is not a con-
stant. The energy rating decreases non–linearly with an in-
crease of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of drain–
to–source avalanche at currents up to rated pulsed current
(IDM), the energy rating is specified at rated continuous cur-
rent (ID), in accordance with industry custom. The energy rat-
ing must be derated for temperature as shown in the
accompanying graph (Figure 12). Maximum energy at cur-
rents below rated continuous ID can safely be assumed to
equal the values indicated.
Motorola TMOS Power MOSFET Transistor Device Data
5
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