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GS78132AB の電気的特性と機能

GS78132ABのメーカーはGSI Technologyです、この部品の機能は「256K x 32 8Mb Asynchronous SRAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 GS78132AB
部品説明 256K x 32 8Mb Asynchronous SRAM
メーカ GSI Technology
ロゴ GSI Technology ロゴ 




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GS78132AB Datasheet, GS78132AB PDF,ピン配置, 機能
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GS78132AB
BGA
Commercial Temp
Industrial Temp
256K x 32
8Mb Asynchronous SRAM
8, 10, 12 ns
3.3 V VDD
Features
• Fast access time: 8, 10, 12 ns
• CMOS low power operation: 260/210/180 mA at minimum
cycle time
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Byte control
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• 14 mm x 22 mm, 119-bump, 1.27 mm Pitch Ball Grid Array
package
• RoHS-compliant package available
Description
The GS78132A is a high speed CMOS Static RAM organized
as 262,144-words by 32-bits. Static design eliminates the need
for external clocks or timing strobes. The GS78132A operates
on a single 3.3 V power supply, and all inputs and outputs are
TTL-compatible. The GS78132A is available in a
14 mm x 22 mm BGA package.
Pin Descriptions
Symbol
Description
A0 to A17
Address input
CE Chip enable input
DQA1 TO DQA8
Byte A Data input/output
DQB1 TO DQB8
Byte B Data input/output
DQC1 TO DQC8
Byte C Data input/output
DQD1 TO DQD8
Byte D Data input/output
BA Byte A Byte enable input
BB Byte B Byte enable input
BC Byte C Byte enable input
BD Byte D Byte enable input
WE Write enable input
OE Output enable input
VDD +3.3 V power supply
VSS Ground
NC No connect
Block Diagram
A0 Row
Decoder
Address
Input
Buffer
A17
CE
WE
OE Control
Bx ____
Memory Array
Column
Decoder
I/O Buffer
DQ1 DQ32
Rev: 1.04 5/2006
1/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology

1 Page





GS78132AB pdf, ピン配列
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GS78132AB
Truth Table
CE OE WE BA BB BC BD
DQA1–A8
H X X XXX X
LLL L
HL L L
L L H LHL L
LLHL
LLLH
LLL L
HL L L
L X L LHL L
LLHL
LLLH
L H H XXX X
L X X HHH H
X: “H” or “L”
Not Selected
Read
High Z
Read
Read
Read
Write
High Z
Write
Write
Write
High Z
High Z
DQB1–B8
Not Selected
Read
Read
High Z
Read
Read
Write
Write
High Z
Write
Write
High Z
High Z
DQC1–C8
Not Selected
Read
Read
Read
High Z
Read
Write
Write
Write
High Z
Write
High Z
High Z
DQD1–D8
Not Selected
Read
Read
Read
Read
High Z
Write
Write
Write
Write
High
High Z
High Z
Supply
Current
ISB1, ISB2
IDD
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
Input Voltage
Output Voltage
Allowable power dissipation
VDD
VIN
VOUT
PD
–0.5 to +4.6
–0.5 to VDD +0.5
(4.6 V max.)
–0.5 to VDD +0.5
(4.6 V max.)
1.5
V
V
V
W
Storage temperature
TSTG
–55 to 150
oC
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.04 5/2006
3/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology


3Pages


GS78132AB 電子部品, 半導体
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AC Characteristics
Read Cycle
Parameter
Read cycle time
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
GS78132AB
Symbol
tRC
tAA
tAC
tOE
tOH
tLZ*
tOLZ*
tHZ*
tOHZ*
-8
Min Max
8—
—8
—8
— 3.5
3—
3—
0—
—4
— 3.5
-10
Min Max
10 —
— 10
— 10
—4
3—
3—
0—
—5
—4
-12
Min Max
12 —
— 12
— 12
—5
3—
3—
0—
—6
—5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle 1:CE = OE = VIL , WE = VIH, BA = BB = BC = BD = VIL
Address
Data Out
tOH
Previous Data
tRC
tAA
Data valid
Rev: 1.04 5/2006
6/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology

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部品番号部品説明メーカ
GS78132AB

256K x 32 8Mb Asynchronous SRAM

GSI Technology
GSI Technology


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