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GS1559 の電気的特性と機能

GS1559のメーカーはGennum Corporationです、この部品の機能は「HD-LINX-TM II Multi-Rate Deserializer」です。


製品の詳細 ( Datasheet PDF )

部品番号 GS1559
部品説明 HD-LINX-TM II Multi-Rate Deserializer
メーカ Gennum Corporation
ロゴ Gennum Corporation ロゴ 




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GS1559 Datasheet, GS1559 PDF,ピン配置, 機能
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GS1559 HD-LINX™ II
Multi-Rate Deserializer with
Loop-Through Cable Driver
GS1559 Data Sheet
Key Features
• SMPTE 292M and SMPTE 259M-C compliant
descrambling and NRZI NRZ decoding (with
bypass)
• DVB-ASI sync word detection and 8b/10b decoding
• auto-configuration for HD-SDI, SD-SDI and
DVB-ASI
• serial loop-through cable driver output selectable as
reclocked or non-reclocked
• dual serial digital input buffers with 2 x 1 mux
• integrated serial digital signal termination
• integrated reclocker
• automatic or manual rate selection / indication
(HD/SD)
• descrambler bypass option
• user selectable additional processing features
including:
• CRC, TRS, ANC data checksum, line number
and EDH CRC error detection and correction
• programmable ANC data detection
• illegal code remapping
• internal flywheel for noise immune H, V, F
extraction
• FIFO load Pulse
• 20-bit / 10-bit CMOS parallel output data bus
• 148.5MHz / 74.25MHz / 27MHz / 13.5MHz parallel
digital output
• automatic standards detection and indication
• 1.8V core power supply and 3.3V charge pump
power supply
• 3.3V digital I/O supply
• JTAG test interface
• Available in a Pb-free package
• small footprint (11mm x 11mm)
Applications
• SMPTE 292M Serial Digital Interfaces
• SMPTE 259M-C Serial Digital Interfaces
• DVB-ASI Serial Digital Interfaces
Description
The GS1559 is a reclocking deserializer with a serial
loop-through cable driver. When used in conjunction
with the GS1574 Automatic Cable Equalizer and the
GO1525 Voltage Controlled Oscillator, a receive
solution can be realized for HD-SDI, SD-SDI and
DVB-ASI applications.
In addition to reclocking and deserializing the input data
stream, the GS1559 performs NRZI-to-NRZ decoding,
descrambling as per SMPTE 292M/259M-C, and word
alignment when operating in SMPTE mode. When
operating in DVB-ASI mode, the device will word align
the data to K28.5 sync characters and 8b/10b decode
the received stream.
Two serial digital input buffers are provided with a 2x1
multiplexer to allow the device to select from one of two
serial digital input signals.
The integrated reclocker features a very wide Input
Jitter Tolerance of ±0.3 UI (total 0.6 UI), a rapid
asynchronous lock time, and full compliance with
DVB-ASI data streams.
An integrated cable driver is provided for serial input
loop-through applications and can be selected to output
either buffered or reclocked data. This cable driver also
features an output mute on loss of signal, high
impedance mode, adjustable signal swing, and
automatic dual slew-rate selection depending on
HD/SD operational requirements.
The GS1559 also includes a range of data processing
functions such as error detection and correction,
automatic standards detection, and EDH support. The
device can also detect and extract SMPTE 352M
payload identifier packets and independently identify
the received video standard. This information is read
from internal registers via the host interface port.
Line-based CRC errors, line number errors, TRS errors,
EDH CRC errors and ancillary data checksum errors
can all be detected. A single ‘DATA_ERROR’ pin is
provided which is a logical 'OR'ing of all detectable
errors. Individual error status is stored in internal
‘ERROR_STATUS’ registers.
Finally, the device can correct detected errors and
insert new TRS ID words, line-based CRC words,
ancillary data checksum words, EDH CRC words, and
line numbers. Illegal code re-mapping is also available.
All processing functions may be individually enabled or
disabled via host interface control.
30572 - 4 July 2005
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GS1559 pdf, ピン配列
Contents
GS1559 Data Sheet
Key Features .................................................................................................................1
Applications ...................................................................................................................1
Description ....................................................................................................................1
1. Pin Out .....................................................................................................................5
1.1 Pin Assignment ...............................................................................................5
1.2 Pin Descriptions ..............................................................................................6
2. Electrical Characteristics ........................................................................................16
2.1 Absolute Maximum Ratings ..........................................................................16
2.2 DC Electrical Characteristics ........................................................................16
2.3 AC Electrical Characteristics.........................................................................18
2.4 Solder Reflow Profiles...................................................................................20
3. Input/Output Circuits ..............................................................................................21
3.1 Host Interface Map........................................................................................23
3.1.1 Host Interface Map (R/W Configurable Registers) .............................24
3.1.2 Host Interface Map (Read Only Registers) .........................................25
4. Detailed Description ...............................................................................................26
4.1 Functional Overview .....................................................................................26
4.2 Serial Digital Input .........................................................................................26
4.2.1 Input Signal Selection .........................................................................27
4.2.2 Carrier Detect Input ............................................................................27
4.2.3 Single Input Configuration ..................................................................27
4.3 Serial Digital Reclocker .................................................................................27
4.3.1 External VCO......................................................................................28
4.3.2 Loop Bandwidth ..................................................................................28
4.4 Serial Digital Loop-Through Output ..............................................................28
4.4.1 Output Swing ......................................................................................29
4.4.2 Reclocker Bypass Control ..................................................................29
4.4.3 Serial Digital Output Mute...................................................................30
4.5 Serial-To-Parallel Conversion .......................................................................30
4.6 Modes Of Operation......................................................................................31
4.6.1 Lock Detect.........................................................................................31
4.6.2 Master Mode.......................................................................................32
4.6.3 Slave Mode.........................................................................................32
4.7 SMPTE Functionality ....................................................................................34
4.7.1 SMPTE Descrambling and Word Alignment .......................................34
4.7.2 Internal Flywheel.................................................................................34
4.7.3 Switch Line Lock Handling..................................................................35
4.7.4 HVF Timing Signal Generation ...........................................................39
4.8 DVB-ASI Functionality ..................................................................................41
4.8.1 DVB-ASI 8b/10b Decoding and Word Alignment................................41
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3Pages


GS1559 電子部品, 半導体
1.2 Pin Descriptions
GS1559 Data Sheet
Table 1-1: Pin Descriptions
Pin
Number
A1
Name
LF
Timing
Analog
A2 VCO_VCC
A3 VCO_GND
A4, A5
VCO, VCO
Analog
A6, B5,
B6, C4,
C5, D2,
D3, D7,
E3, E7,
F2, F3, F7,
G2, G3,
G7, H3,
J2, J3, J4,
A7
NC
PCLK
A8, E8, K8
IO_VDD
Type Description
Output
Output
Power
Output
Power
Input
Control voltage to external voltage controlled oscillator. Nominally +1.25V
DC.
Power supply for the external voltage controlled oscillator. Connect to pin 7
of the GO1525. This pin is an output.
Should be isolated from all other power supplies.
Ground reference for the external voltage controlled oscillator. Connect to
pins 2, 4, 6, and 8 of the GO1525. This pin is an output.
Should be isolated from all other grounds.
Differential inputs for the external VCO reference signal. For single ended
devices such as the GO1525, VCO should be AC coupled to VCO_GND.
VCO is nominally 1.485GHz.
No Connect.
Output
Power
PARALLEL DATA BUS CLOCK
Signal levels are LVCMOS/LVTTL compatible.
HD 20-bit mode
PCLK = 74.25MHz or 74.25/1.001MHz
HD 10-bit mode
PCLK = 148.5MHz or 148.5/1.001MHz
SD 20-bit mode
PCLK = 13.5MHz
SD 10-bit mode
PCLK = 27MHz
Power supply connection for digital I/O buffers. Connect to +3.3V DC
digital.
30572 - 4 July 2005
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部品番号部品説明メーカ
GS1559

HD-LINX-TM II Multi-Rate Deserializer

Gennum Corporation
Gennum Corporation


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