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PDF TMP86C29B Data sheet ( Hoja de datos )

Número de pieza TMP86C29B
Descripción (TMP86Cx29B) CMOS 8-Bit Microcontroller
Fabricantes Toshiba Semiconductor 
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TMP86FM29
Comparison table of TMP86C829B/H29B/M29B/PM29A/PM29B/C929AXB and TMP86FM29
Difference
ROM
RAM
I/O
External
Interrupt
AD Converter
Timer Counter
Serial Interface
LCD
Key-on
Wakeup
Operating
Voltage
in MCU Mode
Operating
Temperature
in MCU Mode
Writing to
Flash Memory
CPU Wait (Note 1)
TMP86C829B
TMP86CH29B
TMP86CM29B
TMP86PM29A
TMP86PM29B
8 K (Mask ROM)
16 K (Mask ROM)
32 K (OTP)
32 K (Mask ROM)
512
1.5 K
1.5 K
1.5 K
42 pin
TMP86C929AXB
(Emulation chip)
(Note 3)
42 pin (MCU part)
5 pin
10-bit AD converter × 8 ch
18-bit timer × 1 ch
8-bit timer × 4 ch
8-bit UART / SIO × 1 ch
32 seg × 4 com
4 ch
1.8 to 5.5 V at 4.2 MHz
2.7 to 5.5 V at 8 MHz
4.5 to 5.5 V at 16 MHz
1.8 to 5.25 V at 4.2 MHz
2.7 to 5.25 V at 8 MHz
4.5 to 5.25 V at 16 MHz
40 to 85
0 to 60°C
N/A
TMP86FM29F
32 K (Flash)
2K
42 pin
5 pin
10-bit AD converter × 8 ch
18-bit timer × 1 ch
8-bit timer × 4 ch
8-bit UART / SIO × 1 ch
32 seg × 4 com (Note 2)
4 ch
1.8 to 3.6 V at 4.2 MHz (External clock)
1.8 to 3.6 V at 8 MHz (Resonator)
2.7 to 3.6 V at 16 MHz
40 to 85°C
2.7 to 3.6V at 16 MHz
25°C ± 5°C
Available
Note 1: The CPU wait is a CPU halt function for stabilizing of power supply of Flash memory. The CPU wait
period is as follows. In the CPU wait period except RESET, CPU is halted but peripheral functions
are not halted. Therefore, if the interrupt occurs during the CPU wait period, the interrupt latch is set.
In this case, if the IMF has been set to “1”, the interrupt service routine is executed after CPU wait
period. For details refer to 2.14 “Flash Memory” in TMP86FM29 data sheet.
Thus, even if the same software is executed in 86FM29 and 86C829B/H29B/M29B/PM29A/PM29B
/C929AXB, the operation process is not the same. Therefore, when the final operating confirmation
on target application is executed for software development of Mask ROM Product
(86C829B/H29B/M29B), not the Flash product (86FM29) but the OTP product (86PM29A/PM29B)
should be used.
Condition
After reset release
Changing from STOP mode to NORMAL mode
(at EEPCR<MNPWDW> = “1”)
Changing from STOP mode to SLOW mode
(at EEPCR<MNPWDW> = “1”)
Changing from IDLE0/1/2 mode to NORMAL mode
(at EEPCR<ATPWDW> = “0”)
Changing from SLEEP0/1/2 mode to SLOW mode
(at EEPCR<ATPWDW> = “0”)
Wait Time
210/fc[s]
210/fc[s]
23/fs[s]
210/fc[s]
23/fs[s]
Halt/Operate
CPU
Peripherals
Halt Halt
Halt Operate
Halt Operate
Halt Operate
Halt Operate
2004-03-01

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TMP86C29B pdf
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Pin Assignments (Top View)
P-LQFP64-1010-0.50E
P-QFP64-1414-0.80C
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V3
V2
V1
C1
C0
( DVO ) P30
( PWM3 / PDO3 /TC3) P31
( PWM4 / PDO4 / PPG4 /TC4) P32
( PWM6 / PDO6 / PPG6 /TC6) P33
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
TMP86FM29
32 P54 (SEG19)
31 P53 (SEG20)
30 P52 (SEG21)
29 P51 (SEG22)
28 P50 (SEG23)
27 P17 (SEG24/ SCK )
26 P16 (SEG25/TXD/SO)
25 P15 (SEG26/RXD/SI/BOOT)
24 P14 (SEG27/INT3)
23 P13 (SEG28/INT2)
22 P12 (SEG29/INT1)
21 P11 (SEG30)
20 P10 (SEG31)
19 AVDD
18 VAREF
17 P67 (AIN7/STOP5)
86FM29-3
2004-03-01

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TMP86C29B arduino
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TMP86FM29
DC Characteristics (VSS = 0 V, Topr = −40 to 85°C)
Parameter Symbol
Pins
Condition
Min
Hysteresis voltage
VHS Hysteresis input
IIN1 TEST
VDD = 3.3 V
VDD = 3.6 V, VIN = 0 V
Input current
IIN2 Sink open drain, Tri-state VDD = 3.6 V, VIN = 3.6 V/0 V
Input resistance
High frequency
feedback resistor
Low frequency
feedback resistor
Output leakage
current
Output high voltage
Output low voltage
Output low current
LCD output voltage
(LCD booster is
enable)
Supply current in
NORMAL 1, 2 mode
Supply current in
IDLE 0, 1, 2 mode
Supply current in
SLOW 1 mode
Supply current in
SLEEP 1 mode
Supply current in
SLEEP 0 mode
Supply current in
STOP mode
IIN3
RIN1
RIN2
RFB
RESET
TEST pull down
RESET pull up
XOUT
VDD = 3.6 V, VIN = 3.6 V
VDD = 3.6 V, VIN = 3.6 V
VDD = 3.6 V, VIN = 0 V
VDD = 3.6 V
RFBT XTOUT
VDD = 3.6 V
ILO
VOH
VOL
IOL
V2-3OUT
Sink open drain, Tri-state
CMOS, Tri-state
Except XOUT, P3 port
P3 port
V2 pin
V3 pin
Fetch Flash area
area RAM area
Fetch Flash area
area RAM area
VDD = 3.6 V
VOUT = 3.4V/0.2 V
VDD = 3.6 V, lOH = −0.6 mA
VDD = 3.6 V, IOL = 0.9 mA
VDD = 3.6 V, VOL = 1.0 V
V3 VDD
Reference supply pin: V1
SEG/COM pin: No load
VDD = 3.6 V
MNP = “1”
VIN = 3.4 V/0.2 V MNP = “0”
fc = 16 MHz
MNP•ATP = “1”
fs = 32.768 kHz MNP•ATP = “0”
MNP = “1”
VDD = 3.0 V
VIN = 2.8 V/0.2 V
fs = 32.768 kHz
MNP = “0”
MNP•ATP = “1”
MNP•ATP = “0”
MNP•ATP = “1”
MNP•ATP = “0”
VDD = 3.6 V
VIN = 3.4 V/0.2 V
100
3.2
Typ.
0.4
70
220
Max
5
±5
+5
450
3
20
− ±10
6
V1 x 2
0.4
V1 x 3
5.3
3.4
3.1
2.2
850
7
850
5.5
850
4.5
7.3
5.2
5.2
4.2
1200
19
1200
17
1200
15
0.5 10
Unit
V
µA
k
M
µA
V
mA
V
mA
µA
Note 1: Typical values show those at Topr = 25°C.
Note 2: Input current (IIN1, IIN2): The current through pull-up or pull-down resistor is not included.
Note 3: IDD does not include IREF current.
Note 4: The supply currents of SLOW2 and SLEEP2 modes are equivalent to IDLE0, IDLE1, IDLE2.
Note 5: MNP (MNPWDW) shows bit0 in EEPCR register and ATP (ATPWDW) shows bit1 in EEPCR
register.
Note 6: “Fetch” means reading operation of FLASH data as an instruction by CPU.
86FM29-176
2004-03-01

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