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Número de pieza | NL17SZ125 | |
Descripción | Non-Inverting 3-State Buffer | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NL17SZ125
Non-Inverting 3-State Buffer
The NL17SZ125 is a high performance non−inverting buffer operating
from a 1.65 V to 5.5 V supply.
Features
• Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5.0 V
• Designed for 1.65 V to 5.5 V VCC Operation
• Overvoltage Tolerant Inputs and Outputs
• LVTTL Compatible − Interface Capability With 5.0 V TTL Logic
with VCC = 3.0 V
• LVCMOS Compatible
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current Substantially Reduces System
Power Requirements
• 3−State OE Input is Active−Low
• Replacement for NC7SZ125
• Chip Complexity = 36 FETs
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
OE EN
IN A
OUT Y
Figure 1. Logic Symbol
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MARKING DIAGRAMS
SC−88A (SOT−353)
DF SUFFIX
CASE 419A
M0 MG
G
SOT−553
XV5 SUFFIX
CASE 463B
5
1
TSOP−5
DT SUFFIX
CASE 483
UDFN6
1.0 x 1.0
CASE 517BX
M0 MG
G
5
M0 MG
G
1
M
1
SOT−953
CASE 527AE
M
1
M0 or F = Specific Device Code
(F with 90 degree clockwise rotation)
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 18
1
Publication Order Number:
NL17SZ125/D
1 page NL17SZ125
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
VCC
TA = 255C
−555C 3 TA 3 1255C
(V) Min Typ Max Min Max Units Condition
IIN Input Leakage Current 0 to 5.5
IOZ 3−State Output
Leakage
1.65 to 5.5
IOFF Power Off Leakage
Current (SOT−353/
TSOP−5/SC−88A/
SOT−553/ UDFN
Packages)
0
±0.1
±0.5
1.0
±1.0
±5.0
10
mA VIN = 5.5 V or GND
mA VIN = VIH or VIL
0 V ≤ VOUT ≤ 5.5 V
mA VIN = 5.5 V or
VOUT = 5.5 V
ICC Quiescent Supply
Current
5.5
1.0 10 mA VIN = 5.5 V or GND
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS (tR = tF = 3.0 ns)
Symbol
Parameter
Condition
VCC TA = 255C
(V) Min Typ Max
tPLH Propagation Delay
RL = 1 MW
tPHL AN to YN
(Figures 4 and 5, Table 1) RL = 1 MW
RL = 1 MW
RL = 500 W
RL = 1 MW
RL = 500 W
CL = 15 pF 1.8 ± 0.15 2.0 9.0 10
CL = 15 pF 2.5 ± 0.2 1.0
7.5
CL = 15 pF 3.3 ± 0.3 0.8
CL = 50 pF
1.2
5.2
5.7
CL = 15 pF 5.0 ± 0.5 0.5
CL = 50 pF
0.8
4.5
5.0
tPZH Output Enable Time
RL = 250 W
tPZL (Figures 6, 7and 8, Table 1)
CL = 50 pF 1.8 ± 0.15 2.0 7.6 9.5
2.5 ± 0.2 1.8
8.5
3.3 ± 0.3 1.2
6.2
5.0 ± 0.5 0.8
5.5
tPHZ Output Disable Time
RL and R1= 500 WCL = 50 pF 1.8 ± 0.15 2.0 8.0 10
tPLZ (Figures 6, 7and 8, Table 1)
2.5 ± 0.2 1.5
8.0
3.3 ± 0.3 0.8
5.7
5.0 ± 0.5 0.3
4.7
−555C 3 TA 3 1255C
Min Max
2.0 10.5
1.0 8.0
0.8 5.5
1.2 6.0
0.5 4.8
0.8 5.3
2.0 10
1.8 9.0
1.2 6.5
0.8 5.8
2.0 10.5
1.5 8.5
0.8 6.0
0.3 5.0
Units
ns
ns
ns
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical Units
CIN Input Capacitance
VCC = 5.5 V, VI = 0 V or VCC
2.5 pF
COUT
CPD
Output Capacitance
Power Dissipation Capacitance
(Note 6)
VCC = 5.5 V, VI = 0 V or VCC
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
10 MHz, VCC = 5.5 V, VI = 0 V or VCC
2.5 pF
9 pF
11
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
www.onsemi.com
5
5 Page NL17SZ125
PACKAGE DIMENSIONS
UDFN6, 1x1, 0.35P
CASE 517BX
ISSUE O
D
PIN ONE
REFERENCE
ÉÉÉÉÉÉ2X 0.08 C
2X 0.08 C TOP VIEW
0.05 C DETAIL B
0.05 C
SIDE VIEW
e
DETAIL A
1
3
AB
E
A3
A
L1 L
L3
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTION
ÉÉÇÉÉÇEXPOSED Cu
MOLD CMPD
DETAIL B
ALTERNATE
CONSTRUCTION
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
MILLIMETERS
DIM MIN MAX
A 0.50 0.65
A1 0.00 0.05
A3 0.13 REF
b 0.17 0.23
D 1.00 BSC
E 1.00 BSC
e 0.35
L 0.20 0.40
L1 −−− 0.15
L3 0.26 0.33
A1
C
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
6X L
6X 0.25
6X
0.52
64
BOTTOM VIEW
6X b
0.07 M C A B
0.05 M C NOTE 3
1.20
PACKAGE
OUTLINE 1
0.35
PITCH
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
11
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet NL17SZ125.PDF ] |
Número de pieza | Descripción | Fabricantes |
NL17SZ125 | Non-Inverting 3-State Buffer | ON Semiconductor |
NL17SZ126 | Non-Inverting 3-State Buffer | ON Semiconductor |
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