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ISL22346 の電気的特性と機能

ISL22346のメーカーはIntersil Corporationです、この部品の機能は「Dual Digitally Controlled Potentiometers」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL22346
部品説明 Dual Digitally Controlled Potentiometers
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL22346 Datasheet, ISL22346 PDF,ピン配置, 機能
ISL22346
® Quad Digitally Controlled Potentiometers (XDCP™)
Data Sheet
July 28, 2006
FN6177.0
Low Noise, Low Power I2C® Bus, 128 Taps
The ISL22346 integrates four digitally controlled
potentiometers (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the two
DCP’s IVR to the corresponding WRs.
The DCPs can be used as a three-terminal potentiometers
or as a two-terminal variable resistors in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Pinout
www.DataSheet4U.com
ISL22346
(20 LD TSSOP)
TOP VIEW
RH3
RL3
RW3
A2
SCL
SDA
GND
RW2
RL2
RH2
1
2
3
4
5
6
7
8
9
10
20 RW0
19 RL0
18 RH0
17 SHDN
16 VCC
15 A1
14 A0
13 RH1
12 RL1
11 RW1
Features
• Four potentiometers in one package
• 128 resistor taps
• I2C serial interface
- Three address pins, up to eight devices/bus
• Non-volatile storage of wiper position
• Wiper resistance: 70typical @ 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kor 10ktotal resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T <55°C
• 20 Ld TSSOP
• Pb-free plus anneal product (RoHS compliant)
Ordering Information
PART NUMBER
PART MARKING
RESISTANCE OPTION
(k)
TEMP. RANGE
(°C)
PACKAGE
PKG. DWG. #
ISL22346UFV20Z
(Notes 1, 2)
22346 UFVZ
50
-40 to +125
20 Ld TSSOP
M20.173
(Pb-Free)
ISL22346WFV20Z
(Notes 1, 2)
22346 WFVZ
10
-40 to +125
20 Ld TSSOP
M20.173
(Pb-Free)
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Add “-TK” suffix for 1,000 Tape and Reel option
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL22346 pdf, ピン配列
ISL22346
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC+0.3
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with Respect to GND. . . . . . . -0.3V to VCC
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . . 300°C
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 4) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
(CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1kV
Thermal Information
Thermal Resistance (Typical, Note 3)
20 Lead TSSOP package . . . . . . . . . . . . . . . . . . . .
θJA (°C/W)
90
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW
Wiper Current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -0.8V for all pins.
Analog Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (NOTE 5) MAX
UNIT
RTOTAL RH to RL Resistance
W option
U option
10 k
50 k
RH to RL Resistance Tolerance
End-to-End Temperature Coefficient
W and U option
W option
-20 +20 %
±50 ppm/°C
(Note 19)
U option
±80 ppm/°C
(Note 19)
VRH, VRL VRH and VRL Terminal Voltages
RW Wiper Resistance
CH/CL/CW Potentiometer Capacitance
(Note 19)
VRH and VRL to GND
VCC = 3.3V @ +25°C, wiper current =
VCC/RTOTAL
0 VCC
70 200
10/10/25
V
pF
ILkgDCP Leakage on DCP Pins
Voltage at pin from GND to VCC
0.1 1 µA
VOLTAGE DIVIDER MODE (0V @ RLi; VCC @ RHi; measured at RWi, unloaded; i = 0, 1, 2, or 3)
INL Integral Non-linearity
(Note 10)
Monotonic over all tap positions
-1
1 LSB
(Note 6)
DNL Differential Non-linearity
(Note 9)
Monotonic over all tap positions
-0.5
0.5 LSB
(Note 6)
ZSerror Zero-scale Error
(Note 7)
W option
U option
0 1 5 LSB
(Note 6)
0 0.5 2
FSerror Full-scale error
(Note 8)
W option
U option
-5 -1
0 LSB
(Note 6)
-2 -1 0
VMATCH DCP to DCP Matching
(Note 11)
TCV Ratiometric Temperature Coefficient
(Note 12)
Any two DCPs at same tap position, same
voltage at all RH terminals, and same voltage
at all RL terminals
DCP register set to 40 hex
-2
±4
2 LSB
(Note 6)
ppm/°C
RESISTOR MODE (Measurements between RWi and RLi with RHi not connected, or between RWi and RHi with RLi not connected. i = 0, 1, 2 or 3)
RINL Integral nOn-linearity
(Note 16)
DCP register set between 10h and 7Fh;
monotonic over all tap positions
-1
1 MI
(Note 13)
3 FN6177.0
July 28, 2006


3Pages


ISL22346 電子部品, 半導体
ISL22346
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (NOTE 5) MAX
UNIT
tHD:A A2, A1 and A0 Hold Time
After STOP condition
600
ns
NOTES:
5. Typical values are for TA = +25°C and 3.3V supply voltage.
6. LSB: [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
7. ZS error = V(RW)0/LSB.
8. FS error = [V(RW)127 – VCC]/LSB.
9. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 127. i is the DCP register setting.
10. INL = [V(RW)i – i • LSB – V(RW)0]/LSB for i = 1 to 127.
11. VMATCH = [V(RWx)i – V(RWy)i]/LSB, for i = 1 to 127, x = 0 to 3 and y = 0 to 3.
12.
TCV
=
-------M-----a----x----(--V----(---R-----W------)--i--)---–-----M-----i--n----(--V-----(--R-----W------)--i--)------ × ----1---0----6----- for i = 16 to 112 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper
[Max(V(RW)i) + Min(V(RW)i)] ⁄ 2 165°C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.
13. MI = |RW127 – RW0|/127. RW127 and RW0 are the measured resistances for the DCP register set to 7F hex and 00 hex respectively.
14. Roffset = RW0/MI, when measuring between RW and RL.
Roffset = RW127/MI, when measuring between RW and RH.
15. RDNL = (RWi – RWi-1)/MI - 1, for i = 16 to 127.
16. RINL = [RWi – (MI • i) – RW0]/MI, for i = 16 to 127.
17. RMATCH = (RWi,x – RWi,y)/MI, for i = 1 to 127, x = 0 to 3 and y = 0 to 3.
18.
TCR =
----[---M-----a----x----(--R-----i--)---–-----M-----i--n----(--R-----i--)--]---- × ----1----0---6----- for i = 16 to 112, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min ( ) is
[Max(Ri) + Min(Ri)] ⁄ 2 165°C the minimum value of the resistance over the temperature range.
19. This parameter is not 100% tested.
20. tWC is the time from a valid STOP condition at the end of a Write sequence of I2C serial interface, to the end of the self-timed internal non-volatile
write cycle.
SDA vs SCL Timing
tF
tHIGH
tLOW
tR
tsp
SCL
tSU:STA
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tSU:DAT
tHD:STA
tHD:DAT
tAA tDH
tSU:STO
tBUF
A0, A1, and A2 Pin Timing
SCL
START
CLK 1
STOP
SDA
A0, A1, OR A2
tSU:A
tHD:A
6 FN6177.0
July 28, 2006

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
ISL22343

Quad Digitally Controlled Potentiometer

Intersil
Intersil
ISL22346

Dual Digitally Controlled Potentiometers

Intersil Corporation
Intersil Corporation
ISL22346WM

Quad Digitally Controlled Potentiometers

Intersil
Intersil
ISL22349

Dual Digitally Controlled Potentiometers

Intersil Corporation
Intersil Corporation


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