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STP140NF55のメーカーはST Microelectronicsです、この部品の機能は「N-CHANNEL POWER MOSFET」です。 |
部品番号 | STP140NF55 |
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部品説明 | N-CHANNEL POWER MOSFET | ||
メーカ | ST Microelectronics | ||
ロゴ | |||
このページの下部にプレビューとSTP140NF55ダウンロード(pdfファイル)リンクがあります。 Total 11 pages
STB140NF55
STP140NF55
N-CHANNEL 55V - 0.0065 Ω - 80A TO-220/D²PAK
STripFET™ II POWER MOSFET
Table 1: General Features
TYPE
VDSS
RDS(on)
STB140NF55
STP140NF55
55 V
55 V
< 0.008 Ω
< 0.008 Ω
■ TYPICAL RDS(on) = 0.0065 Ω
ID
80 A
80 A
Figure 1:Package
DESCRIPTION
This Power Mosfet is the latest development of
STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility.
3
1
D2PAK
TO-263
(Suffix “T4”)
3
2
1
TO-220
APPLICATIONS
■ MOTOR CONTROL
■ HIGH CURRENT, SWITCHING
APPLICATIONS
■ AUTOMOTIVE ENVIRONMENT
Figure 2: Internal Schematic Diagram
www.DataSheet4U.com
Table 2: Order Codes
Part Number
STB140NF55T4
STP140NF55
MARKING
B140NF55
P140NF55
Table 3:ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID
IDM(•)
Drain Current (continuous) at TC = 100°C
Drain Current (pulsed)
Ptot Total Dissipation at TC = 25°C
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
EAS(2) Single Pulse Avalanche Energy
Tstg Storage Temperature
Tj Operating Junction Temperature
(•) Pulse width limited by safe operating area.
(**) Current Limited by Package
December 2004
PACKAGE
D²PAK
TO-220
PACKAGING
TAPE & REEL
TUBE
Value
55
± 20
80
80
320
300
2
10
1.3
Unit
V
V
A
A
A
W
W/°C
V/ns
mJ
-55 to 175
°C
(1) ISD ≤80A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
(2) Starting Tj = 25 oC, ID = 40A, VDD = 30V
Rev. 2
1/11
1 Page STB140NF55 STP140NF55
ELECTRICAL CHARACTERISTICS (continued)
Table 8: SWITCHING ON
Symbol
Parameter
Test Conditions
td(on)
tr
Turn-on Delay Time
Rise Time
VDD = 27.5 V
ID = 40 A
RG = 4.7 Ω
VGS = 10 V
(Resistive Load, Figure 3)
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD= 44V ID= 80A VGS= 10V
Min.
Typ.
30
150
142
27
55
Max.
Unit
ns
ns
nC
nC
nC
Table 9: SWITCHING OFF
Symbol
Parameter
td(off)
tf
Turn-off Delay Time
Fall Time
Test Conditions
VDD = 27.5 V
ID = 40 A
RG = 4.7 Ω
VGS = 10 V
(Resistive Load, Figure 3)
Min.
Typ.
125
45
Max.
Unit
ns
ns
Table 10: SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
ISD
ISDM (•)
Source-drain Current
Source-drain Current (pulsed)
VSD (*) Forward On Voltage
ISD = 80 A
VGS = 0
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
(*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(•)Pulse width limited by safe operating area.
ISD = 80 A
di/dt = 100A/µs
VDD = 20 V
Tj = 150°C
(see test circuit, Figure 5)
Min.
Typ.
90
275
6.5
Max.
80
320
1.5
Unit
A
A
V
ns
µC
A
Figure 3: Safe Operating Area
Figure 4: Thermal Impedance
3/11
3Pages STB140NF55 STP140NF55
Figure 15: Unclamped Inductive Load Test Cir- Figure 16: Unclamped Inductive Waveform
Fciugiutre 17: Switching Times Test Circuits For Resis-
tive Load
Figure 18: Gate Charge test Circuit
Figure 19: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/11
6 Page | |||
ページ | 合計 : 11 ページ | ||
|
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部品番号 | 部品説明 | メーカ |
STP140NF55 | N-CHANNEL POWER MOSFET | ST Microelectronics |