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Número de pieza | NUP4304MR6 | |
Descripción | Low Capacitance Diode Array | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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NUP4304MR6
Low Capacitance Diode
Array for ESD Protection in
Four Data Lines
NUP4304MR6 is a MicroIntegration™ device designed to provide
protection for sensitive components from possible harmful electrical
transients; for example, ESD (electrostatic discharge).
Features
• Low Capacitance (1.5 pF Maximum Between I/O Lines)
• Single Package Integration Design
• Provides ESD Protection for JEDEC Standards JESD22
Machine Model = Class C
Human Body Model = Class 3B
• Protection for IEC61000−4−2 (Level 4)
8.0 kV (Contact)
15 kV (Air)
• Ensures Data Line Speed and Integrity
• Fewer Components and Less Board Space
• Direct the Transient to Either Positive Side or to the Ground
Applications
• USB 1.1 and 2.0 Data Line Protection
• T1/E1 Secondary IC Protection
• T3/E3 Secondary IC Protection
• HDSL, IDSL Secondary IC Protection
• Video Line Protection
• Microcontroller Input Protection
• Base Stations
• I2C Bus Protection
• Pb−Free Package is Available
MAXIMUM RATINGS (Each Diode) (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Reverse Voltage
Forward Current
Peak Forward Surge Current
Repetitive Peak Reverse Voltage
Average Rectified Forward
Current (Note 1)
(averaged over any 20 ms period)
VR 70 Vdc
IF 200 mAdc
IFM(surge) 500 mAdc
VRRM
70
V
IF(AV)
715 mA
Repetitive Peak Forward Current
Non−Repetitive Peak Forward Current
t = 1.0 ms
t = 1.0 ms
t = 1.0 S
IFRM
IFSM
450 mA
A
2.0
1.0
0.5
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR−5 = 1.0 0.75 0.062 in.
© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 1
1
http://onsemi.com
PIN CONFIGURATION
AND SCHEMATIC
I/O 1
VP 2
1/O 3
6 I/O
5 VN
4 I/O
54
6
123
TSOP−6
CASE 318F
PLASTIC
MARKING DIAGRAM
LG MG
G
LG = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NUP4304MR6T1 TSOP−6 3000/Tape & Reel
NUP4304MR6T1G TSOP−6 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NUP4304MR6/D
1 page NUP4304MR6
Option 4
Protection of four data lines without biasing of the internal
steering diodes.
I/O 1
I/O 2
I/O 3
I/O 4
1
2
3
6
5
4
2
D1 D3 D5 D7
1 3 46
D2 D4 D6 D8
5
NUP4304MR6 Equivalent Circuit
In applications lacking a positive supply reference an
external TVS diode may be used as a reference. For these
applications, the TVS is connected between pin 2 and the
ground plane. The steering diodes will conduct whenever
the voltage on the protected line exceeds their forward
voltage plus the working voltage of the TVS diode (Vc=Vf
+ VTVS). In this case, the effective capacitance of the
steering diodes will be higher than if a bias was applied.
http://onsemi.com
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PDF Descargar | [ Datasheet NUP4304MR6.PDF ] |
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NUP4304MR6 | Low Capacitance Diode Array | ON Semiconductor |
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