DataSheet.jp

GF9105A の電気的特性と機能

GF9105AのメーカーはGennumです、この部品の機能は「Component Digital Transcoder」です。


製品の詳細 ( Datasheet PDF )

部品番号 GF9105A
部品説明 Component Digital Transcoder
メーカ Gennum
ロゴ Gennum ロゴ 




このページの下部にプレビューとGF9105Aダウンロード(pdfファイル)リンクがあります。

Total 30 pages

No Preview Available !

GF9105A Datasheet, GF9105A PDF,ピン配置, 機能
www.DataSheet4U.com
MultiGENTM GF9105A
Component Digital Transcoder
FEATURES
• drop in replacement for the GF9105 with lower power
and increased functionality
• new mode for HVF output
• new mode for using low frequency clocks with non-
multiplexed I/O data
• optimized HOST IF control signals for ensured shared
bus compatibility
• multiple format conversions from one device
4:2:2:4 <-> 4:4:4:4
4:2:2:4 <-> R/G/B/KEY
4:2:2:4 <-> Y/U/V/KEY
Y/U/V/KEY <-> R/G/B/KEY
4:4:4:4 <-> R/G/B/KEY
4:4:4:4 <-> Y/U/V/KEY
• ITU-R-601 compliant interpolation/decimation filters
• supports both single link 4:4:4:4 (SMPTE RP174) and
dual link 4:4:4:4 (SMPTE RP175) compliant I/O
• transparent conversions between Y/U/V and R/G/B
color spaces.
• fully programmable 3X3 Color Space Converter (CSC)
• 13 bit Color Space Converter coefficients
• 13 bit KEY Channel scaling coefficient
• multiplexed and non-multiplexed I/O data
• bi-directional I/O data ports with tri-stating
• parallel HOST IF for reading and writing multiplier
coefficients and device configuration words
• single +5V power supply.
ORDERING INFORMATION
PART NUMBER
GF9105ACQQ
PACKAGE
160 Pin MQFP
DATA SHEET
DEVICE OVERVIEW
The GF9105A is a drop in replacement for the GF9105 with
lower power and increased functionality. This increased
functionality gives the user the option of having HVF output
signals and the option of using a low frequency clock when
operating with non-multiplexed input and output data. The
GF9105A is a flexible VDSP engine capable of performing a
variety of format conversions. The flexible architecture of
the GF9105A also allows the user to perform a wide range
of DSP functions that require a general 3X3 multiplier
structure and/or high performance 1:2 interpolation and 2:1
decimation filters. Device configuration is selected by
writing configuration words through an asynchronous
parallel interface (HOST IF).
The GF9105A accepts either multiplexed or non-
multiplexed input data and may produce either multiplexed
or non-multiplexed output data. External H, V and F inputs
allow for the insertion of TRS words into multiplexed output
data streams.
All interpolation and decimation filtering required for ITU-R-
601 compliant 4:2:2:4 <-> 4:4:4:4 sample rate conversions
has been integrated into the GF9105A. In addition, all input
and output offset adjustments required for transparent
conversions between the Y/U/V and R/G/B color spaces
have been included within the GF9105A.
The color space converter within the GF9105A has 13 bit
multiplier coefficients, has 13 bit output resolution,
maintains full precision throughout the 3X3 calculation and
has a true unity gain by-pass mode. Sufficient resolution is
maintained within the color space converter to ensure that
truly transparent Y/U/V <-> R/G/B conversions may be
achieved. A user programmable output clipper allows the
GF9105A to output a variety of word lengths to meet
specific system requirements.
The GF9105A is packaged in a 160 pin MQFP package,
operates from a single +5V supply.
Y/G, CB/B, CR/R, KEY OR
Y/G, CB/B, CR/R, OR Y/G
XX OR CB/B
13
13
XX OR CR/R
13
11
KEY, CB/B, CR/R OR KEY
Y/G Y/G
DEMUX
4:4:4:4
OR
4:2:2:4
CB/B
CR/R
H_BLANK
AND
INPUT
OFFSET
ADJUST
CB/B
CR/R
KEY KEY
Y/G
INT
CB/B
INT
CR/R
KEY
3X3
MATRIX
MULTIPLIER
KEY SCALER
Y/G
CB/B
CR/R
KEY
Y/G
DEC
CB/B
DEC
CR/R
Y/G
OUTPUT
OFFSET CB/B
ADJUST
CR/R
KEY KEY
Y/G
OUTPUT
CLIP
CB/B
CR/R
OUTPUT
MULTIPLEXER
KEY
13 Y/G, CB/B, CR/R, KEY OR
Y/G, CB/B, CR/R, OR Y/G
13
CB/B OR XX
13
CR/R OR XX
11
KEY OR KEY, CB/B, CR/R
GENERAL FUNCTIONALITY OF GF9105A CORE
Revision Date: March 2000
Document No. 521 - 88 - 03
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: [email protected]
www.gennum.com

1 Page





GF9105A pdf, ピン配列
PIN DESCRIPTION
PIN NO.
33
34
35
36
37
38
SYMBOL
TDI
TMS
TRST
TDO
TN_IN
PTO
DESCRIPTION
JTAG Test Data Input: Serial input for JTAG test data.
JTAG Test Mode Select: Serial input for selecting JTAG test mode.
JTAG Test Reset: Connect to GND for normal operation.
JTAG Test Data Output: Serial output for JTAG test data.
Connect to VDD.
No Connect.
P112..0
P212..0
P312..0
P410..0
147
148
151
152
153
154
155
156
157
159
160
1
2
P112/HOUT
P111
P110
P19
P18
P17
P16
P15
P14
P13
P12
P11
P10
131
132
133
134
135
136
137
139
142
143
144
145
146
P212/VOUT
P211
P210
P29
P28
P27
P26
P25
P24
P23
P22
P21
P20
115
116
117
118
119
122
123
124
125
126
127
128
130
P312/FOUT
P311
P310
P39
P38
P37
P36
P35
P34
P33
P32
P31
P30
GF9105A
102
103
104
106
107
108
109
110
111
112
114
P410
P49
P48
P47
P46
P45
P44
P43
P42
P41
P40
27
28
29
30
31
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
3
5
6
8
9
12
13
15
COEFF_PORT7
COEFF_PORT6
COEFF_PORT5
COEFF_PORT4
COEFF_PORT3
COEFF_PORT2
COEFF_PORT1
COEFF_PORT0
P512
P511
P510
P59
P58
P57
P56
P55
P54
P53
P52
P51
P50
P612
P611
P610
P69
P68
P67
P66
P65
P64
P63
P62
P61
P60
P712
P711
P710
P79
P78
P77
P76
P75
P74
P73
P72
P71
P70
P810
P89
P88
P87
P86
P85
P84
P83
P82
P81
P80
54
53
50
49
48
47
46
45
44
42
41
40
39
70
69
68
67
66
65
64
62
59
58
57
56
55
86
85
84
83
82
79
78
77
76
75
74
73
71
99
98
97
95
94
93
92
91
90
89
87
P512..0
P612..0
P712..0
P810..0
Fig. 1 GF9105A Data Pin Designations
3
521 - 88 - 03


3Pages


GF9105A 電子部品, 半導体
SL/DL_IN
BYPASS_F
MUXED_IN
GS9001 HB[1:0] IOA[1:0]
FIL_RND
RND8/10
22
MATRIX &
KEY SCALER
COEFFICIENTS
LOWF
RND8/10
OOA[1:0]
OUTPUT/INPUT
2
CLP_D[1:0] MUXED OUT 4:4:4:4/4:2:2:4_OUT
RND8/10
2
GS9001 SL/DL_OUT
S
Y/G, CB/B, CR/R, KEY
13 C1
OR Y/G, CB/B, CR/R,OR Y/G
XX OR CB/B
13 C2
XX OR CR/R
13 C3
KEY, CB/B, CR/R OR KEY
11 C4
10
DEMUX
4:4:4:4
OR
4:2:2:4
Y/G
10
CB/B
10
CR/R
Y/G
H_BLANK
AND
INPUT
OFFSET
ADJUST
CB/B
CR/R
10
KEY KEY
Y/G
INT
CB/B
INT
CR/R
KEY
3X3
MATRIX
MULTIPLIER
KEY SCALER
Y/G Y/G
CB/B
CR/R
OUTPUT
OFFSET
CB/B
ADJUST
CR/R
Y/G
OUTPUT CB/B
CLIPPING
CR/R
OUTPUT
MULTIPLEXER
KEY KEY
KEY
13
C5
C6 13
13
C7
Y/G, CB/B, CR/R,KEY OR
Y/G, CB/B, CR/R, OR Y/G
CB/B OR XX
CR/R OR XX
C8 11
KEY OR KEY, CB/B, CR/R
SYNC_CB
H_BLANK
CLOCK
DP_EN
HV F
Fig. 5a Functionality of GF9105A Processing Core when INT/DEC = 1, HVF_OUT = 0
SL/DL_IN
MUXED_IN GS9001
HB [1:0] IOA [1:0]
22
MATRIX &
KEY SCALER
COEFFICIENTS
RND8/10
BYPASS_F OOA [1:0]
LOWF RND8/10
OUTPUT/INPUT
FIL_RND
2
CLP_D [1:0]
MUXED OUT 4:4:4:4/4:2:2:4_OUT
RND8/10
2
GS9001 SL/DL_OUT
S
Y/G, CB/B, CR/R, KEY OR
Y/G, CB/B, CR/R, OR Y/G
13 C1
XX OR CB/B
XX OR CR/R
13 C2
13 C3
KEY, CB/B, CR/R OR KEY
11 C4
13
DEMUX
4:4:4:4
OR
4:2:2:4
Y/G
13
CB/B
13
CR/R
Y/G
H_BLANK
AND
INPUT
OFFSET
ADJUST
CB/B
CR/R
11
KEY KEY
3X3
MATRIX
MULTIPLIER
KEY SCALER
Y/G
CB/B
CR/R
KEY
Y/G Y/G
DEC OUTPUT
CB/B OFFSET CB/B
DEC ADJUST
CR/R CR/R
Y/G
OUTPUT
CLIPPING
CB/B
OUTPUT
MULTIPLEXER
CR/R
KEY KEY
KEY
C5 13
C6 13
C7 13
Y/G, CB/B, CR/R, KEY OR
Y/G, CB/B, CR/R, OR Y/G
CB/B OR XX
CR/R OR XX
C8 11
KEY OR KEY, CB/B, CR/R
SYNC_CB
H_BLANK
CLOCK
DP_EN
HV F
Fig. 5b Functionality of GF9105A Processing Core when INT/DEC = 0, HVF_OUT = 0
521 - 88 - 03
6

6 Page



ページ 合計 : 30 ページ
 
PDF
ダウンロード
[ GF9105A データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
GF9105A

Component Digital Transcoder

Gennum
Gennum


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap