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PDF VMX1C1016 Data sheet ( Hoja de datos )
| Número de pieza | VMX1C1016 | |
| Descripción | Versa Mix 8051 Mixed-Signal MCU | |
| Fabricantes | Ramtron | |
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VMX1C1016
Datasheet
Rev 1.0
Versa Mix 8051 Mixed-Signal MCU
Overview
The VMX51C1016 is a fully integrated mixed-signal
microcontroller that provides a “one-chip” solution for
a broad range of control, data acquisition and
processing applications. The VXM1016 is based on a
powerful, single-cycle, RISC-based 8051 processor
with an enhanced MULT/ACCU unit that can be used
to perform complex mathematical operations. The
device includes 56KB of Flash memory and 1280
bytes of RAM.
On-chip analog peripherals such as: an A/D
converter, PWM outputs (that can be used as D/A
converters), a voltage reference and an analog switch
make the VMX51C1020 ideal for analog data
acquisition applications.
The inclusion of a full set of digital interfaces such as
an enhanced, fully configurable SPI, an I²C, UARTs
and a J1708/RS-485 compatible differential
transceiver, enables total system integration.
The VMX51C1016 operates on a 5 volt supply and is
available in a QFP-44 package.
Applications
o Automotive Applications
o Industrial Controls / Instrumentation
o Consumer Products
o Medical Devices
FIGURE 1: VMX51C1016 BLOCK DIAGRAM
8051
µPROCESSOR
SINGLE CYCLE
1 2 -BIT A/D
CONVERTER
XTVREF Input
ADCITA connected to A /D Input
Multiplexer
Band gap
Reference
PGA
4 P4W4PM4WPOWPMuWMtDpMDu/AtD/ssA/sA s
8 / 16 bit Resolution
(Can be used as D /A s )
XTAL
1 DIGITALLY
CONTROLLED
SWITCH
J 1708 /RS 485
Compatible
Transceiver
Clock Control Unit
In -Circuit
Debugging
through UART0
2 UARTs
Serial Ports
56KB
Program FLASH
(In -Circuit Programmable )
1280 Bytes RAM
(256 x8 & 1kX8)
· 24 I/O s
· 1 I n t. input
· Int. Port1
change
· 3 Timers ,
· 2 Baud Rate
Generators
· 2 CCU inputs
[M U L T / A C C U ]
Unit with
BARREL
SHIFTER
SPI Interface
I²C Bus
Interface
Power On Reset
Circuit
+
WatchDog Timer
Feature Set
o 8051 Compatible RISC Performance Processor
Enhanced Arithmetic Unit including Barrel Shifter
o 56KB of Flash Memory
o 1280 Bytes of RAM
o 24 General Purpose I/Os
o 2 UART Serial Ports
o 2 Baud Rate Generators for UARTs
o Diff. Transceiver connected to UART1
J1708/RS-485 compatible)
o Enhanced SPI interface (Master/Slave)
o Fully configurable
o Control up to 4 Slave devices
o I²C interface
o 1 External Dedicated Interrupt Input
o Interrupt on Port 1.0-P1.3 Pin Change
o 3, 16-bit Timers/Counters
o 4 Compare Units and 2 Capture Inputs
o 4 Ch. PWM, 8-bit / 16-bit resolution
o 5 Ch. 12-bit A/D Converter
o Conversion rate configurable up to
10KHz
o Continuous/One-Shot Operation
o Single or 4-Channel Automatic
Sequential Conversions
o On-Chip Voltage Reference
o Digitally Controlled Switch
o Power Saving Features + Clock Control
o Watchdog Timer
o Operating Temperature range (0ºC to +70ºC)
o Available in QFP-44 package
FIGURE 2: VMX51C1016-QAC14, QFP-44 PACKAGE PINOUT
INT0
PM
RES-
ADCITA
VDDA
ADCI3
ADCI2
ADCI1
ADCI0
XTVREF
AGND
33
34
23
22
VMX51C1016
QFP-44
44
1
12
11
VDD
P2.7-SDI
P2.6-SDO
P2.5-SCK
P2.4-SS-
P2.3-CS0-
P2.2-CS1-
P2.1-CS2-
P2.0-CS3-
DGND
P1.3-PWM3
Table 1: Pinout description
Ramtron International Corporation ? http://www.ramtron.com
1850 Ramtron Drive Colorado Springs ? MCU customer service: 1-800-943-4625, 1-514-871-2447, ext. 208
Colorado, USA, 80921 ? 1-800-545-FRAM, 1-719-481-7000
page 1of 76
1 page  
VMX51C1016
ANALOG INPUTS
ADCI(0-3) Input Voltage Range
ADCI(0-3) Input Resistance
ADCI(0-3) Input Capacitance
ADCI(0-3)
Current
Input
Leakage
Channel-to-Channel Crosstalk
VADCI
RADCI
CADCI
IADCI
0
INTERNAL REFERENCE
Bandgap Reference Voltage
1.18
Bandgap Reference Tempco
EXTERNAL REFERENCE
Input Impedance
PGA
RXTVREF
PGA Gain adjustment
2.11
ANALOG TO DIGITAL CONVERTER
External Reference, TA=25C, Fosc = 16MHz
ADC Resolution
Differential Non linearity
DNL
Integral Non linearity
INL
-1
Full-Scale Error (Gain Error)
All channels, ADCI(0-3)
Offset Error
All channels, ADCI(0-3)
Channel-to-Channel Mismatch
All channels, ADCI(0-3)
Sampling Rate
Single Channel
1
4 Channels
1
UART1 DIFFERENTIAL TRANSCEIVER COMPATIBLE TO J1708/ RS-485
Common mode Input Voltage
VcI
-2
Input Impedance
ZIN
Output Drive Current
Differential Input
DIGITAL SWITCH
Switch on Resistance
50
Input capacitance
Voltage range on Pin
0
Allowable current (DC)
BROWN OUT / RESET CIRCUIT
Brown-out circuit Threshold
3.7
RES- pin internal Pull-Up
100
7
TBD
1.23V
100
150
2.7 V
Mohms (design)
pF
nA
-72 dB (design)
(12 bit)
1.28 V
ppm/°C
kOhms
2.29
12
±4
±1
±1
1
30
100mV
4
20
±1.5
+4
10k
2.5k
Bits
LSB
LSB
LSB
LSB
LSB
Hz
+7 V
MOhms
mA
mV
100 Ohms (+/-10%)
pF
5V
5 mA
4.0 V
KOhms
_________________________________________________________________________________________________________
www.ramtron.com
page 5 of 76
5 Page 
VMX51C1016
Peripheral Activation Control
Digital Peripherals Power Enable
To save power upon reset, many of the digital
peripherals of the VMX51C1016 are not
activated. The peripherals affected by this are:
o Timer 2 / Port1
o Watchdog timer
o MULT/ACCU unit
o I²C interface
o SPI interface
o UART0
o UART1
o Differential transceiver
Before using any of the above-listed peripherals,
they must first be enabled by setting the
corresponding bit of the DIGPWREN SFR
register to 1.
The same rule applies when accessing a given
peripheral’s SFR register(s). The targeted
peripheral must have been powered on
(enabled) first, otherwise the SFR register
content will be ignored
The following table demonstrates the structure
of the DIGPWREN register.
TABLE 13: (DIGPWREN) DIGITAL PERIPHERALS POWER ENABLE REGISTER - SFR
93H
7 6 54
T2CLKEN WDOGEN
MACEN
I2CEN
3
SPIEN
2 10
UART1DIFFEN UART1EN UART0EN
Bit Mnemonic
Function
Timer 2 / PWM Enable
7
T2CLKEN
0 = Timer 2 CLK stopped
1 = Timer 2 CLK Running
Watch Dog Enable
6 WDOGEN 0 = Watch Dog Disable
1 = Watch Dog Enable
5
MACEN
1 = MULT/ACCU Unit Enable
0 = MULT/ACCU Unit Disable
1= I2C Interface Enable
4
I2CEN
0 = I2C Interface Disable
This bit is merged with CLK STOP bit
3
SPIEN
1 = SPI interface is Enable
0 = SPI interface is Disable
UART1 Differential mode
2 UART1DIFFEN 0 = Disable
1 = Enable
1
UART1EN
0 = UART1 Disable
1 = UART1 Enable
0
UART0EN
0 = UART0 Disable
1 = UART0 Enable
Analog Peripherals Power Enable
The analog peripherals, such as the A/D,
bandgap and PGA analog-to-digital converter,
have a shared dedicated register used for
enabling and disabling these peripherals. By
default, these peripherals are powered down
when the device is reset.
TABLE 14: (ANALOGPWREN) ANALOG PERIPHERALS POWER ENABLE REGISTER -
SFR 92H
76
5
4
00
0
0
321
0
0
ADCEN
PGAEN
BGAPEN
Bit Mnemonic
70
60
50
40
3 TAEN
2 ADCEN
1 PGAEN
0 BGAPEN
Function
Reserved, Keep at 0
Reserved, Keep at 0
Reserved, Keep at 0
Reserved, Keep at 0
1 = TA Output Enable
0 = TA Output Disable
1 = ADC Enable
0 = ADC Disable
1 = PGA Enable
0 = PGA Disable
1 = Bandgap Enable
0 = Bandgap Disable
Note:
The SFR registers associated with all
analog peripherals are activated when
one or more analog peripherals are
enabled.
_________________________________________________________________________________________________
www.ramtron.com
page 11 of 76
11 Page | ||
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| PDF Descargar | [ Datasheet VMX1C1016.PDF ] | |
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