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MC34002のメーカーはON Semiconductorです、この部品の機能は「(MC34001x - MC34004x) JFET INPUT OPERATIONAL AMPLIFIERS」です。 |
部品番号 | MC34002 |
| |
部品説明 | (MC34001x - MC34004x) JFET INPUT OPERATIONAL AMPLIFIERS | ||
メーカ | ON Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとMC34002ダウンロード(pdfファイル)リンクがあります。 Total 12 pages
ON Semiconductort
JAFmEpTlifIinepreusett4OUp.ceormational MMMCCC333444000000124,,, BBBThese low cost JFET input operational amplifiers combine two
hstate–of–the–art analog technologies on a single monolithic integrated
Scircuit. Each internally compensated operational amplifier has well matched
tahigh voltage JFET input devices for low input offset voltage. The BIFET
atechnology provides wide bandwidths and fast slew rates with low input bias
.Dcurrents, input offset currents, and supply currents.
The ON Semiconductor BIFET family offers single, dual and quad
woperational amplifiers which are pin–compatible with the industry standard
wMC1741, MC1458, and the MC3403/LM324 bipolar devices. The MC34001/
w 34002/34004 series are specified from 0° to +70°C.
m• Input Offset Voltage Options of 5.0 mV and 10 mV Maximum
• Low Input Bias Current: 40 pA
o• Low Input Offset Current: 10 pA
.c• Wide Gain Bandwidth: 4.0 MHz
• High Slew Rate: 13 V/µs
• Low Supply Current: 1.4 mA per Amplifier
U• High Input Impedance: 1012 Ω
t4• High Common Mode and Supply Voltage Rejection Ratios: 100 dB
e• Industry Standard Pinouts
JFET INPUT
OPERATIONAL AMPLIFIERS
8
1
P SUFFIX
PLASTIC PACKAGE
CASE 626
8
1
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
PIN CONNECTIONS
Offset Null 1
Inv. Input 2
Noninv. Input 3
VEE 4
+
8 NC
7 VCC
6 Output
5 Offset Null
MC34001 (Top View)
he Output A 1
Inputs A
2-
+
3
S VEE 4
8 VCC
7 Output B
-6
+
Inputs B
5
ta MC34002 (Top View)
www.Da .comOpAmp
UFunction
et4Single
SheDual
ataQuad
ORDERING INFORMATION
Device
Operating
Temperature Range
MC34001BD, D
MC34001BP, P
TA = 0° to+ 70°C
MC34002BD, D
MC34002BP, P
TA = 0° to +70°C
MC34004BP, P
TA = 0° to +70°C
Package
SO–8
Plastic DIP
SO–8
Plastic DIP
Plastic DIP
14
1
P SUFFIX
PLASTIC PACKAGE
CASE 646
PIN CONNECTIONS
Output 1 1
2
Inputs 1
3
VCC 4
5
Inputs 2
6
-
+1
+
-2
Output 2 7
14 Output 4
13
-
4
+
12
Inputs 4
11 VEE
10
+
3- 9
Inputs 3
8 Output 3
MC34004 (Top View)
ww.D© Semiconductor Components Industries, LLC, 2002
wMarch, 2002 – Rev. 2
1
Publication Order Number:
MC34001/D
1 Page MC34001, B MC34002, B MC34004, B
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = Tlow to Thigh [Note 2].)
Characteristics
Symbol
Min
Typ
Max Unit
Input Offset Voltage (RS ≤ 10 k)
MC3400XB
MC3400X
VIO mV
— — 7.0
— — 13
Input Offset Current (VCM = 0) (Note 3)
MC3400XB
MC3400X
IIO nA
— — 4.0
— — 4.0
Input Bias Current (VCM = 0) (Note 3)
MC3400XB
MC3400X
IIB nA
— — 8.0
— — 8.0
Common Mode Input Voltage Range
Large Signal (VO = ±10 V, RL = 2.0 k)
MC3400XB
MC3400X
VICR
AVOL
±11
25
15
—
—
—
—V
V/mV
—
—
Output Voltage Swing
(R ≥ 10 k)
(R ≥ 2.0 k)
VO V
±12 —
—
±10 —
—
Common Mode Rejection Ratio (RS ≤ 10 k)
MC3400XB
MC3400X
CMRR
dB
80 — —
70 — —
Supply Voltage Rejection Ratio (RS ≤ 10 k) (Note 4)
MC3400XB
MC3400X
PSRR
dB
80 — —
70 — —
Supply Current (Each Amplifier)
MC3400XB
MC3400X
ID mA
— — 2.8
— — 3.0
NOTES: 2. Tlow = 0°C for MC34001/34001B
0°C for MC34002
Thigh = +70°C for MC34001/34001B
+70°C for MC34002
0°C for MC34004/34004B
+70°C for MC34004/34004B
3. The input bias currents approximately double for every 10°C rise in junction temperature, TJ. Due to limited test time, the input bias currents are
correlated to junction temperature. Use of a heatsink is recommended if input bias current is to be kept to a minimum.
4. Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.
http://onsemi.com
3
3Pages MC34001, B MC34002, B MC34004, B
Representative Circuit Schematic
(Each Amplifier)
Output
Bias Circuitry
Common to All
Amplifiers
Q4 Q5
Q3
-
Inputs
+
J1
Q14
Q12
Q10
J2
Q17
Q20
Q15 Q19
10 pF
Q23
24
Q13 Q16
Q21 Q22 Q24
Q11
Q2
Q1
Q6
Q9 Q8
2.0 k
J3
Q7 Q25
VCC
Offset
Null
(MC34001 only)
1.5 k
Q18
1.5 k
VEE
MSB A1
A2
A3
A4
A5
A6
A7
LSB A8
Figure 12. Output Current to Voltage Transformation
for a D–to–A Converter
VCC
R1
D-to-A
1
Io
R2
Vref
VCC = 15 V
+ VO
- MC34001
Settling time to within 1/2 LSB is approximately 4.0 µs
from the time all bits are switched (C = 68 pF).
The value of C may be selected to minimize overshoot
and ringing.
Theoretical VO
VO =
Vref
R1
(RO)
A1
2
+
A2
4
+
A3
8
+
A4
16
+
A5
32
+
A6
64
+
A7
128
+
A8
256
15 pF
VEE
VEE = -15 V
RO
C
http://onsemi.com
6
6 Page | |||
ページ | 合計 : 12 ページ | ||
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PDF ダウンロード | [ MC34002 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
MC34001 | (MC34001 - MC34004) JFET INPUT OPERATIONAL AMPLIFIERS | Motorola Semiconductors |
MC34001 | (MC33001x - MC35001x) GENERAL PURPOSE SINGLE JEFT OPERATIONAL AMPLIFIERS | ST Microelectronics |
MC34001 | (MC34001x - MC34004x) JFET INPUT OPERATIONAL AMPLIFIERS | ON Semiconductor |
MC34001A | (MC33001x - MC35001x) GENERAL PURPOSE SINGLE JEFT OPERATIONAL AMPLIFIERS | ST Microelectronics |