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MC74AC175 の電気的特性と機能

MC74AC175のメーカーはON Semiconductorです、この部品の機能は「Quad D Flip-Flop」です。


製品の詳細 ( Datasheet PDF )

部品番号 MC74AC175
部品説明 Quad D Flip-Flop
メーカ ON Semiconductor
ロゴ ON Semiconductor ロゴ 




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MC74AC175 Datasheet, MC74AC175 PDF,ピン配置, 機能
MQMuCaas7dt4eADrSCRhF1eele7ispt54e-,UFtM.lcooCpm7W4AitChT175The MC74AC/ACT175 is a high–speed quad D flip–flop. The
tadevice is useful for general flip–flop requirements where clock and
clear inputs are common. The information on the D inputs is
atransferred to storage during the LOW–to–HIGH clock transition. The
.Ddevice has a Master Reset to simultaneously clear all flip–flops, when
wMR is low.
wThe MC74AC/ACT175 consists of four edge–triggered D flip–flops
w with individual D inputs and Q and Q outputs. The Clock (CP) and
Master Reset (MR) are common to all flip–flops. Each D input’s state
mis transferred to the corresponding flip–flop’s output following the
oLOW–to–HIGH Clock (CP) transition. A LOW input to the Master
Reset (MR) will force all Q outputs LOW and Q outputs HIGH
.cindependent of Clock or Data inputs. The MC74AC/ACT175 is useful
for applications where the Clock and Master Reset are common to all
storage elements.
UOutputs Source/Sink 24 mA
t4ACT175 Has TTL Compatible Inputs
eVCC Q3 Q3 D3 D2 Q2 Q2 CP
16 15 14 13 12 11 10 9
taShe1 2 3 4 5 6 7 8
MR Q0 Q0 D0 D1 Q1 Q1 GND
aFigure 1. Pinout: 16–Lead Packages
(Top View)
.DPIN ASSIGNMENT
PIN FUNCTION
wD0 – D3
CP
Data Inputs
Clock Pulse Input
wMR Master Reset Input
mQ0 – Q3
w et4U.coQ0 – Q3
Outputs
Outputs
http://onsemi.com
16
1
16
1
16
1
16
1
DIP–16
N SUFFIX
CASE 648
SO–16
D SUFFIX
CASE 751B
TSSOP–16
DT SUFFIX
CASE 948F
EIAJ–16
M SUFFIX
CASE 966
ORDERING INFORMATION
Device
Package
Shipping
MC74AC175N
PDIP–16 25 Units/Rail
MC74ACT175N
PDIP–16 25 Units/Rail
MC74AC175D
SOIC–16 48 Units/Rail
MC74ACT175D
MC74AC175DR2
SOIC–16 48 Units/Rail
SOIC–16 2500 Tape & Reel
MC74ACT175DR2 SOIC–16 2500 Tape & Reel
MC74AC175DT TSSOP–16 96 Units/Rail
MC74ACT175DT TSSOP–16 96 Units/Rail
MC74AC175DTR2 TSSOP–16 2500 Tape & Reel
MC74ACT175DTR2 TSSOP–16 2500 Tape & Reel
MC74AC175M
EIAJ–16
50 Units/Rail
taSheDEVICE MARKING INFORMATION
See general marking information in the device marking
asection on page 176 of this data sheet.
www.DSemiconductor Components Industries, LLC, 2001
171
Publication Order Number:
May, 2001 – Rev. 5
MC74AC175/D

1 Page





MC74AC175 pdf, ピン配列
MC74AC175, MC74ACT175
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Typ Min
VCC
Supply Voltage
AC
ACT
2.0 5.0 6.0
4.5 5.0 5.5
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
0 – VCC
tr, tf
Input Rise and Fall Time (Note 1)
AC Devices except Schmitt Inputs
VCC @ 3.0 V
150
VCC @ 4.5 V
40
VCC @ 5.5 V
25
tr, tf
Input Rise and Fall Time (Note 2)
ACT Devices except Schmitt Inputs
VCC @ 4.5 V
10
VCC @ 5.5 V
8.0
TJ Junction Temperature (PDIP)
– – 140
TA Operating Ambient Temperature Range
–40 25
85
IOH Output Current – HIGH
– – –24
IOL Output Current – LOW
– – 24
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
Unit
V
V
ns/V
ns/V
°C
°C
mA
mA
DC CHARACTERISTICS
Symbol
Parameter
VIH
VIL
VOH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
VCC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
74AC
74AC
TA = +25°C
TA =
–40°C to
+85°C
Typ Guaranteed Limits
1.5 2.1
2.25 3.15
2.75 3.85
2.1
3.15
3.85
1.5 0.9
2.25 1.35
2.75 1.65
0.9
1.35
1.65
2.99 2.9
4.49 4.4
5.49 5.4
2.9
4.4
5.4
Unit
V
V
V
VOL
Maximum Low Level
Output Voltage
3.0 – 2.56
4.5 – 3.86
5.5 – 4.86
3.0 0.002 0.1
4.5 0.001 0.1
5.5 0.001 0.1
2.46
3.76
4.76
0.1
0.1
0.1
V
V
3.0 – 0.36
4.5 – 0.36
5.5 – 0.36
0.44
0.44
0.44
V
IIN Maximum Input
Leakage Current
5.5 – ±0.1
±1.0
µA
IOLD
IOHD
†Minimum Dynamic
Output Current
5.5 – –
5.5 – –
75
–75
mA
mA
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
Conditions
VOUT = 0.1 V
or VCC – 0.1 V
VOUT = 0.1 V
or VCC – 0.1 V
IOUT = – 50 µA
*VIN = VIL or VIH
– 12 mA
IOH – 24 mA
– 24 mA
IOUT = 50 µA
*VIN = VIL or VIH
12 mA
IOH 24 mA
24 mA
VI = VCC, GND
VOLD = 1.65 V Max
VOHD = 3.85 V Min
http://onsemi.com
173


3Pages


MC74AC175 電子部品, 半導体
MC74AC175, MC74ACT175
AC OPERATING REQUIREMENTS
Symbol
Parameter
ts (H) Set–up Time, HIGH or LOW
(L) Dn to CP
Hold Time, HIGH or LOW
th Dn to CP
MR Pulse Width, LOW
tw
CP Pulse Width,
tw HIGH or LOW
Recovery TIme
trec MR to CP
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
VCC*
(V)
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Typ Guaranteed Minimum
5.0 –
2.0
2.5
2.0
2.5
5.0 –
1.0
1.0
Unit
ns
ns
Fig.
No.
3–9
3–9
5.0 –
3.0
4.0 ns 3–6
5.0 –
3.0
3.5 ns 3–6
5.0 –
0
0 ns 3–6
CAPACITANCE
Symbol
Parameter
CIN
CPD
Input Capacitance
Power Dissipation Capacitance
Value
Typ
4.5
45.0
Unit
pF
pF
Test Conditions
VCC = 5.0 V
VCC = 5.0 V
DIP–16
MC74AC175N
AWLYYWW
MC74ACT175N
AWLYYWW
MARKING DIAGRAMS
SO–16
TSSOP–16
AC175
AWLYWW
AC
175
ALYW
ACT175
AWLYWW
ACT
175
ALYW
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
EIAJ–16
74AC175
ALYW
http://onsemi.com
176

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共有リンク

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部品番号部品説明メーカ
MC74AC174

Hex D Flip-Flop

ON Semiconductor
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MC74AC175

Quad D Flip-Flop

ON Semiconductor
ON Semiconductor


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