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PDF MC74HC158A Data sheet ( Hoja de datos )
| Número de pieza | MC74HC158A | |
| Descripción | Quad 2-Input Data Selector / Multiplexer | |
| Fabricantes | Motorola Semiconductor | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
t4U.comQuad 2-Input Data
eSelector/Multiplexer
heHigh–Performance Silicon–Gate CMOS
taSThe MC74HC158A is identical in pinout to the LS158. The device
inputs are compatible with Standard CMOS outputs; with pullup resistors,
athey are compatible with LSTTL outputs.
.DThese devices route 2 nibbles (A or B) to a single port (Y) as deter-
wmined by the Select input. The data is presented at the outputs in inverted
wform for the HC158A. A high level on the Output Enable input sets all four
Y outputs to a high level for the HC158A.
w m• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
o• Operating Voltage Range: 2 to 6V
.c• Low Input Current: 1µA
• High Noise Immunity Characteristic of CMOS Devices
U• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 74 FETs or 18.5 Equivalent Gates
et4Nibble
eA Inputs
taShNibble
aB Inputs
LOGIC DIAGRAM
A0 2
A1 5
A2 11
A3 14
B0 3
B1 6
B2 10
B3 13
4 Y0
7 Y1 Data
9 Y2 Outputs
12 Y3
.DSelect 1
Output 15
Enable
Pin 16 = VCC
Pin 8 = GND
wwPinout: 16–Lead Plastic Package (Top View)
Output
w omVCC Enable A3 B3 Y3 A2 B2 Y2
.c16 15 14 13 12 11 10 9
MC74HC158A
16
1
16
1
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
D SUFFIX
SOIC PACKAGE
CASE 751B–05
DT SUFFIX
TSSOP PACKAGE
CASE 948F-01
ORDERING INFORMATION
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
Plastic
SOIC
TSSOP
FUNCTION TABLE
Inputs
Output
Enable
Select
Outputs
Y0–Y3
HX
H
L L A0–A3
L H B0–B3
X = Don’t Care
A0–A3, B0–B3 = the levels of the respec-
tive Data–Word inputs.
Sheet4U1 2 3 4 5 6 7 8
taSelect A0 B0 Y0 A1 B1 Y1 GND
www.Da2/97
© Motorola, Inc. 1997
3–1
REV 1
1 page  
MC74HC158A
PIN DESCRIPTIONS
INPUTS
A0–A3 (Pins 2,5,11,14)
Nibble A inputs. The data present on these pins is trans-
ferred to the outputs when the Select input is at a low level and
the Output Enable input is at a low level. The data is presented
to the outputs in inverted form for the HC158A.
B0–B3 (Pins 3,6,10,13)
Nibble B inputs. The data present on these pins is trans-
ferred to the outputs when the Select input is at a high level and
the Output Enable input is at a low level. The data is presented
to the outputs in inverted form for the HC158A.
OUTPUTS
Y0–Y3 (Pins 4,7,9,12)
Data outputs. The selected input nibble is presented at
these outputs when the Output Enable input is at a low level.
The data present on these pins is in its inverted form for the
HC158A. For the Output Enable input at a high level, the out-
puts are at a high level for the HC158A.
CONTROL INPUTS
Select (Pin 1)
Nibble select. This input determines the data word to be
transferred to the outputs. A low level on this input selects the
A inputs and a high level selects the B inputs.
Output Enable (Pin 15)
Output Enable input. A low level on this input allows the
selected data to be presented at the outputs. A high level on
this input sets all of the outputs to a high level for the HC158A.
2
A0
3
B0
5
A1
Nibble
Inputs
6
B1
11
A2
10
B2
14
A3
13
B3
15
Output Enable
1
Select
4
Y0
7
Y1
Data
Outputs
9
Y2
12
Y3
Figure 5. Expanded Logic Diagram
High–Speed CMOS Logic Data
DL129 — Rev 6
3–5
MOTOROLA
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC74HC158A.PDF ] | |
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