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S29JL032HのメーカーはSPANSIONです、この部品の機能は「32M BIT CMOS 3.0V FLASH MEMORY」です。 |
部品番号 | S29JL032H |
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部品説明 | 32M BIT CMOS 3.0V FLASH MEMORY | ||
メーカ | SPANSION | ||
ロゴ | |||
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S29JL032H
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write
Flash Memory
Data Sheet
S29JL032H Cover Sheet
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions.
Publication Number S29JL032H_00
Revision B Amendment 8
Issue Date August 31, 2009
1 Page S29JL032H
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write
Flash Memory
Data Sheet
Distinctive Characteristics
Architectural Advantages
Simultaneous Read/Write Operations
– Data can be continuously read from one bank while executing
erase/program functions in another bank.
– Zero latency between read and write operations
Multiple Bank Architecture
– Four bank architectures available (refer to Table 8.2 on page 16).
Boot Sectors
– Top and bottom boot sectors in the same device
– Any combination of sectors can be erased
Manufactured on 0.13 µm Process Technology
Secured Silicon Sector: Extra 256 Byte sector
– Customer lockable: One-time programmable only. Once locked,
data cannot be changed
Zero Power Operation
– Sophisticated power management circuits reduce power consumed
during inactive periods to nearly zero.
Compatible with JEDEC standards
– Pinout and software compatible with single-power-supply flash
standard
Package options
48-pin TSOP
Performance Characteristics
High Performance
– Access time as fast as 60 ns
– Program time: 4 µs/word typical using accelerated programming
function
Ultra Low Power Consumption (typical values)
– 2 mA active read current at 1 MHz
– 10 mA active read current at 5 MHz
– 200 nA in standby or automatic sleep mode
Cycling Endurance: 1 million cycles per sector typical
Data Retention: 20 years typical
Software Features
Supports Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
– Suspends erase operations to read data from, or program data to, a
sector that is not being erased, then resumes the erase operation.
Data# Polling and Toggle Bits
– Provides a software method of detecting the status of program or
erase cycles
Unlock Bypass Program Command
– Reduces overall programming time when issuing multiple program
command sequences
Hardware Features
Ready/Busy# Output (RY/BY#)
– Hardware method for detecting program or erase cycle completion
Hardware Reset Pin (RESET#)
– Hardware method of resetting the internal state machine to the read
mode
WP#/ACC Input Pin
– Write protect (WP#) function protects the two outermost boot
sectors regardless of sector protect status
– Acceleration (ACC) function accelerates program timing
Sector Protection
– Hardware method to prevent any program or erase operation within
a sector
– Temporary Sector Unprotect allows changing data in protected
sectors in-system
General Description
The S29JL032H is a 32 megabit, 3.0 volt-only flash memory device, organized as 2,097,152 words of 16 bits
each or 4,194,304 bytes of 8 bits each. Word mode data appears on DQ15–DQ0; byte mode data appears
on DQ7–DQ0. The device is designed to be programmed in-system with the standard 3.0 volt VCC supply,
and can also be programmed in standard EPROM programmers.
The device is available with an access time of 60, 70, or 90 ns and is offered in a 48-pin TSOP package.
Standard control pins—chip enable (CE#), write enable (WE#), and output enable (OE#)—control normal
read and write operations, and avoid bus contention issues.
The device requires only a single 3.0 volt power supply for both read and write functions. Internally
generated and regulated voltages are provided for the program and erase operations.
Publication Number S29JL032H_00
Revision B Amendment 8
Issue Date August 31, 2009
3Pages Data Sheet
Figures
Figure 8.1 Temporary Sector Unprotect Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 8.2 In-System Sector Protect/Unprotect Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 8.3 Secured Silicon Sector Protect Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 10.1 Program Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 10.2 Erase Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 11.1 Data# Polling Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 11.2 Toggle Bit Algorithm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 12.1 Maximum Negative Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 12.2 Maximum Positive Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 14.1
Figure 14.2
Figure 15.1
ICC1 Current vs. Time (Showing Active and Automatic Sleep Currents) . . . . . . . . . . . . . . . . 45
Typical ICC1 vs. Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Test Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 16.1 Input Waveforms and Measurement Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 17.1 Read Operation Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 17.2 Reset Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 17.3 BYTE# Timings for Read Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 17.4 BYTE# Timings for Write Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 17.5 Program Operation Timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 17.6 Accelerated Program Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 17.7 Chip/Sector Erase Operation Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 17.8 Back-to-back Read/Write Cycle Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 17.9 Data# Polling Timings (During Embedded Algorithms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 17.10 Toggle Bit Timings (During Embedded Algorithms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 17.11 DQ2 vs. DQ6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 17.12 Temporary Sector Unprotect Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 17.13 Sector/Sector Block Protect and Unprotect Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 17.14 Alternate CE# Controlled Write (Erase/Program) Operation Timings . . . . . . . . . . . . . . . . . . 56
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S29JL032H
S29JL032H_00_B8 August 31, 2009
6 Page | |||
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部品番号 | 部品説明 | メーカ |
S29JL032H | 32M BIT CMOS 3.0V FLASH MEMORY | SPANSION |
S29JL032J | Simultaneous Read/Write Flash Memory | SPANSION |