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PDF GLT41116 Data sheet ( Hoja de datos )

Número de pieza GLT41116
Descripción 64k x 16 CMOS Dynamic RAM with Fast Page Mode
Fabricantes ETC 
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No Preview Available ! GLT41116 Hoja de datos, Descripción, Manual

GLT41116
64k x 16 CMOS Dynamic RAM with Fast Page Mode
FEATURES
x 65,536 words by 16 bits organization.
x Fast access time and cycle time.
x Dual CAS input.
x Low power dissipation.
x Read-Modify-Write, RAS-Only Refresh,
CAS-before-RAS Refresh, Hidden Refresh and Test
Mode Capability.
GENERAL DESCRIPTION
The GLT41116 is a 65,536 x 16 bit high-performance
CMOS dynamic random access memory. The GLT41116
offers Fast Page mode, and has both BYTE WRITE and
WORD WRITE access cycles via two CAS pins. The
GLT41116 has symmetric address and accepts 256-cycle
refresh in 4ms interval.
x 256 refresh cycles per 4ms.
x Available in 40-Pin 400 mil SOJ, and 40/44-Pin TSOP
(Type II).
x Single 5.0V±10% Power Supply.
x All inputs and Outputs are TTL compatible.
x Fast Page Mode operation.
All inputs are TTL compatible. Fast Page Mode operation
allows random access up to 256x16 bits, within a page,
with cycle times as short as 18ns.
The GLT41116 is best suited for graphics, and DSP appli-
cations requiring high performance memories.
July 1998 (Rev. 1) 1

1 page




GLT41116 pdf
GLT41116
AC Characteristics (0 °C TA 70 °C, VCC = 5.0V ± 10%) [1] [2]
-30 -35
Parameter
Symbol Min Max Min Max
Read/Write Cycle Time
Read Modify Write Cycle Time
Access Time for RAS
Access Time for CAS
Access TIme from Column Address
CAS to output ion Low-Z
Output buffer turn-off delay from CAS
Transition Time (Rise and Fall)
RAS Precharge Time
RAS Pulse Width
RAS Hold Time
CAS Hold Time
CAS Pulse Width
RAS to CAS Delay Time
RAS to Column Address Delay Time
CAS To RAS Precharge Time
Row Address Setup TIme
Row Address Hold Time
Column Address Setup Time
Column Address Hold Time
Column Address Hold Time Referenced to RAS
Column Address Lead Time Referenced to RAS
Read Command Setup Time
Read Command Hold Time Referenced to RAS
Read Command Hold Time Referenced to CAS
WE Hold Time Referenced to CAS
Write Command Hold time Referenced to RAS
WE Pulse Width
WE Lead Time Referenced to RAS
WE Lead Time Referenced to CAS
Data-In Setup Time
Data-In Hold Time
Data Hold Time Referenced to RAS
WE Setup Time
RAS to WE Delay Time
CAS to WE Delay Time
Column Address to WE Delay Time
CAS Setup TIme (CAS Before RAS Refresh)
CAS Hold Time (CAS Before RAS Refresh)
RAS to CAS Precharge Time
CAS Precharge Time (CBR Counter Test Cycle)
Access Time From CAS Precharge
Fast Page Mode Read/Write Cycle Time
tRC
tRWC
tRAC
tCAC
tAA
tCLZ
tOFF
tT
tRP
tRAS
tRSH
tCSH
tCAS
tRCD
tRAD
tCPRP
tASR
tRAH
tASC
tCAH
tAR
tRAL
tRCS
tRRH
tRCH
tWCH
tWCR
tWP
tRWL
tCWL
tDS
tDH
tDHR
tWCS
tRWD
tCWD
tAWD
tCSR
tCHR
tRPC
tCPT
tCPA
tPC
65 – 70 –
80 – 99 –
– 30 – 35
– 10 11 –
– 15 – 18
0–0–
3838
3 50 3 50
25 – 25 –
30 100k 35 100k
10 – 12 –
30 – 36 –
10 10k 12 10k
13 20 17 24
10 15 12 17
5–5–
0–0–
6–6–
26 – 30 –
15 – 18 –
26 – 30 –
15 – 18 –
0–0–
0–0–
0–0–
6–6–
26 – 30 –
6–6–
10 – 11 –
10 – 11 –
0–0–
7–6–
27 – 31 –
0–0–
47 – 58 –
24 – 29 –
29 – 36 –
5–5–
10 – 10 –
5–5–
20 – 20 –
– 18 – 21
18 – 21 –
-40
Min Max
75 –
105 –
– 40
12 –
– 20
0–
38
3 50
25 –
40 100k
12 –
40 –
12 10k
18 28
13 20
5–
0–
6–
34 –
20 –
34 –
20 –
0–
0–
0–
6–
34 –
6–
12 –
12 –
0–
8–
36 –
0–
63 –
30 –
38 –
5–
10 –
5–
20 –
– 23
23 –
-45
Min Max
80 –
110 –
– 45
– 12
– 22
0–
38
3 50
25 –
45 100k
13 –
46 –
13 10k
18 33
12 23
5–
0–
6–
39 –
23 –
39 –
23 –
0–
0–
0–
6–
39 –
6–
12 –
12 –
0–
8–
41 –
0–
68 –
30 –
40 –
5–
10 –
5–
20 –
– 25
25 –
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
[3] [4]
[3] [4]
[3] [4]
[3]
[5]
[2]
[4]
[4]
[6]
[7]
[7]
[8]
[9]
[8]
[10]
[10]
[11]
[9]
[9]
[9]
[9]
[3]
G-LINK Technology
July 1998 (Rev. 1)
5

5 Page





GLT41116 arduino
GLT41116
18.41 ± 0.1
44
23
A
0.81 TYP
1
0.37
+0.08
-0.07
0.16 M
0.8
0.05 ~ 0.25
22 0.95 ± 0.05
0.17 ± 0.05 1.2 MAX
Detail A
0.5 ± 0.1
0.8± 0.2
SEATING PLANE
Dimensions in Inches (millimeters)
Figure 7. 40/44-Pin TSOP (Type II) Package Dimensions
G-LINK Technology
July 1998 (Rev. 1)
11

11 Page







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