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STP12NK30Z の電気的特性と機能

STP12NK30ZのメーカーはST Microelectronicsです、この部品の機能は「N-CHANNEL 300V - 0.36ohm - 9A - TO-220 Zener-Protected SuperMESH Power MOSFET」です。


製品の詳細 ( Datasheet PDF )

部品番号 STP12NK30Z
部品説明 N-CHANNEL 300V - 0.36ohm - 9A - TO-220 Zener-Protected SuperMESH Power MOSFET
メーカ ST Microelectronics
ロゴ ST Microelectronics ロゴ 




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STP12NK30Z Datasheet, STP12NK30Z PDF,ピン配置, 機能
STP12NK30Z
N-CHANNEL 300V - 0.36- 9A - TO-220
Zener-Protected SuperMESH™Power MOSFET
TYPE
VDSS RDS(on) ID (1) Pw (1)
STP12NK30Z
300 V < 0.4 9 A 90 W
s TYPICAL RDS(on) = 0.36
s EXTREMELY HIGH dv/dt CAPABILITY
s IMPROVED ESD CAPABILITY
s 100% AVALANCHE RATED
s GATE CHARGE MINIMIZED
s VERY LOW INTRINSIC CAPACITANCES
s VERY GOOD MANUFACTURING
REPEATIBILITY
3
2
1
TO-220
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s LIGHTING
s IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
s HIGH CURRENT, HIGH SPEED SWITCHING
ORDERING INFORMATION
SALES TYPE
STP12NK30Z
MARKING
P12NK30Z
PACKAGE
TO-220
PACKAGING
TUBE
December 2002
1/8

1 Page





STP12NK30Z pdf, ピン配列
STP12NK30Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 1 mA, VGS = 0
300
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20V
±10
VGS(th) Gate Threshold Voltage
VDS = VGS, ID = 50µA
3 3.75 4.5
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 4.5 A
0.36 0.4
DYNAMIC
Symbol
gfs (1)
Ciss
Coss
Crss
Coss eq. (3)
RG
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Equivalent Output
Capacitance
Gate Input Resistance
SWITCHING
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise time
Turn-off Delay Time
Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDS = 10 V, ID = 4.5 A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
VGS = 0V, VDS = 0V to 440 V
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
Test Conditions
VDD = 150 V, ID = 4.5 A
RG = 4.7VGS = 10 V
(Resistive Load see, Figure 3)
VDD = 240V, ID = 9 A,
VGS = 10V
Min.
Typ.
5.4
670
125
28
70
3.6
Typ.
16
20
36
10
25
5.5
13.4
Max.
Max.
35
Unit
V
µA
µA
µA
V
Unit
S
pF
pF
pF
pF
Unit
ns
ns
ns
ns
nC
nC
nC
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
9A
36 A
VSD (1) Forward On Voltage
ISD = 9 A, VGS = 0
1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 9 A, di/dt = 100A/µs
VDD = 40V, Tj = 150°C
(see test circuit, Figure 5)
165 ns
0.9 µC
11.2 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
3/8


3Pages


STP12NK30Z 電子部品, 半導体
STP12NK30Z
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8

6 Page



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部品番号部品説明メーカ
STP12NK30Z

N-CHANNEL 300V - 0.36ohm - 9A - TO-220 Zener-Protected SuperMESH Power MOSFET

ST Microelectronics
ST Microelectronics


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