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PDF MC33765 Data sheet ( Hoja de datos )
| Número de pieza | MC33765 | |
| Descripción | Very Low Dropout/Ultra Low Noise 5 Outputs Voltage Regulator | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC33765 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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MC33765
Very Low Dropout/
Ultra Low Noise
5 Outputs Voltage Regulator
The MC33765 is an ultra low noise, very low dropout voltage
regulator with five independent outputs which is available in TSSOP
16 surface mount package.
The MC33765 is available in 2.8 V. The output voltage is the same
for all five outputs but each output is capable of supplying different
currents up to 150 mA for output 4. The device features a very low
dropout voltage (0.11 V typical for maximum output current), very
low quiescent current (5.0 mA maximum in OFF mode, 130 mA typical
in ON mode) and one of the output (output 3) exhibits a very low noise
level which allows the driving of noise sensitive circuitry. Internal
current and thermal limiting protections are provided.
Additionally, the MC33765 has an independent Enable input pin for
each output. It includes also a common Enable pin to shutdown the
complete circuit when not used. The Common Enable pin has the
highest priority over the five independent Enable input pins.
The voltage regulators VR1, VR2 and VR3 have a common input
voltage pin VCC1.
The other voltage regulators VR4 and VR5 have a common input
voltage pin VCC2.
• Five Independent Outputs at 2.8V Typical, based upon voltage
version
• Internal Trimmed Voltage Reference
• Vout Tolerance ±3.0% over the Temperature Range –40°C to +85°C
• Enable Input Pin (Logic–Controlled Shutdown) for Each of the Five
Outputs
• Common Enable Pin to Shutdown the Whole Circuit
• Very Low Dropout Voltage (0.11 V Typical for Output 1, 2, 3 and 5;
0.17 V Typical for Output 4 at Maximum Current)
• Very Low Quiescent Current (Maximum 5.0 µA in OFF Mode,
130 µA Typical in ON Mode)
• Ultra Low Noise for VR3 (30 µV RMS Max, 100 Hz < f < 100 kHz)
• Internal Current and Thermal Limit
• 100 nF for VR1, VR2, VR4 and VR5 and 1.0 µF for VR3 for
Stability
• Supply Voltage Rejection: 60 dB (Typical) @ f = 1.0 kHz
http://onsemi.com
MARKING
DIAGRAMS
16
TSSOP–16
MC33
16
DTB SUFFIX
765
CASE 948F
ALYW
11
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
PIN CONNECTIONS
Bypass
Common Enable
On/Off V–Reg. 1
On/Off V–Reg. 2
On/Off V–Reg. 3
On/Off V–Reg. 4
On/Off V–Reg. 5
GND
1
2
3
4
5
6
7
8
16 Not Connected
15 VCC1
14 Output V–Reg. 1
13 Output V–Reg. 2
12 Output V–Reg. 3
11 Output V–Reg. 4
10 VCC2
9 Output V–Reg. 5
(Top View)
ORDERING INFORMATION
Device
Package
Shipping
MC33765DTB
TSSOP16 96 Units/Rail
MC33765DTBR2
TSSOP16 2500 Units/Reel
© Semiconductor Components Industries, LLC, 2000
April, 2000 – Rev. 2
1
Publication Order Number:
MC33765/D
1 page  
MC33765
REGULATOR ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (For typical values TA = 25°C, for min/max values TA = –40°C to +85°C/Max TJ = 125°C)
Characteristics
Symbol
Min
Typ
Max Unit
Dynamic Parameters
Rise Time (1% 99%) Common Enable at ON state,
Cbypass = 10 nF, Iout at max. current
VR1, VR2, VR4, VR5 with COUT = 100 nF, TA = 25°C
VR3 with COUT = 1.0 mF, TA = 25°C
Fall Time (99% 1%) [COUT = 100 nF, IOUT = 30 mA] (Note 4.)
Overshoot (COUT = 100 nF for VR1, VR2, VR4, VR5
and COUT = 1.0 mF for VR3) at TA = 25°C
Common Enable at ON state, independent enable from OFF to ON state
ton – – 30 ms
– – 150 ms
toff – 100 – ms
– 5 8%
Settling Time (to ±0.1% of nominal) at TA = 25°C
Common Enable at ON state, independent enable from OFF to ON state
– 95 – ms
Noise and Crosstalks
Noise Voltage (100 Hz < f < 100 kHz) with Cbypass = 100 nF
VR1, VR2, VR4, VR5 with COUT = 100 nF
VR3 with COUT = 1.0 mF
Static crosstalk (DC shift) between the Regulator Output, TA = 25°C (Note 5.)
Dynamic CrossTalk Attenuation between the Regulator Outputs
(f = 10 kHz), TA = 25°C (Note 6.)
Thermal Shutdown
mV RMS
– 40 –
– 25 30
– 150 200 mV
30 35
– dB
Thermal Shutdown
– 160 – °C
4. The Fall time is highly dependent on the load conditions, i.e. load current for a specified value of COUT.
5. Static Crosstalk is a DC shift caused by switching ON one of the outputs through independent enable to all other outputs. This parameter
is highly dependent on overall PCB layout and requires the implementation of low–noise GROUND rules (e.g. Ground plane).
6. Dynamic crosstalk is the ratio between a forced output signal to signal transferred to other outputs. This requires special device
configuration to be measured.
http://onsemi.com
5
5 Page 
MC33765
DESIGN HINTS
Reducing the cross–talk between the MC33765 outputs
One of the origin of the DC shift finds its seat in the layout
surrounding the integrated circuit. Particular care has to be
taken when routing the output ground paths. Star grounding
or a ground plane are the absolute conditions to reduce the
noise or shift associated to common impedance situations,
as depicted by Figure 17.
1 16
2 15
WRONG
3 14
4 13
5 12
6 11
7 10
89
common impedance shift
Load1 Load2
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
Star cabling
CORRECT
Load1 Load2
Rlayout
Figure 17. Star Cabling Avoids Coupling by Common Ground Impedance
The first left cabling will generate a voltage shift which will
superimpose on the output voltages, thus creating an
undesirable offset. By routing the return grounds to a single
low impedance point, you naturally shield the circuit against
common impedance disturbances. Figure 18 portraits the text
fixture implemented to test the response of the MC33765.
VCC
10k 10k
10nF
10k
1
2
3
4
5
6
7
8
16
15
14 470nF
13
12 Output 3
11 + 56
10 1µF
9
100nF
18
Output 4
Figure 18. DC Shift Text Fixture
http://onsemi.com
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MC33765.PDF ] | |
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