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PDF SFH6319T Data sheet ( Hoja de datos )
| Número de pieza | SFH6319T | |
| Descripción | LOW CURRENT / HIGH GAIN OPTOCOUPLER | |
| Fabricantes | Siemens Semiconductor Group | |
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FEATURES
• Industry Standard SOIC-8 Surface Mountable
Package
• High Current Transfer Ratio, 800%
• Low Input Current, 0.5mA
• High Output Current, 60mA
• Isolation Test Voltage, 2500 VACRMS
• TTL Compatible Output, VOL=0.1 V
• Adjustable Bandwidth-Access to Base
• Underwriters Lab File #E52744
• Available in Tape and Reel (suffix T)
APPLICATIONS
• Logic Ground Isolation-TTL/TTL, TTL/CMOS,
CMOS/CMOS, CMOS/TTL
• EIA RS 232C Line Receiver
• Low Input Current Line Receiver-Long Lines,
Party Lines
• Telephone Ring Detector
• 117 VAC Line Voltage Status Indication-Low
Input Power Dissipation
• Low Power Systems-Ground Isolation
DESCRIPTION
Very high current ratio together with 2500 VAC isolation
are achieved by coupling an LED with an integrated high
gain photodetector in a SOIC-8 package. Separate pins
for the photodiode and output stage enable TTL compat-
ible saturation voltages with high speed operation. Pho-
todarlington operation is achieved by tying the VCC and
VO terminals together. Access to the base terminal
allows adjustment to the gain bandwidth.
The SFH6318T is ideal for TTL applications since the
300% minimum current transfer ratio with an LED current
of 1.6 mA enables operation with one unit load-in and
one unit load-out with a 2.2 KΩ pull-up resistor.
The SFH6319T is best suited for low power logic applica-
tions involving CMOS and low power TTL. A 400% cur-
rent transfer ratio with only 0.5 mA of LED current is
guaranteed from 0°C to 70°C.
Caution:
Due to the small geometries of this device, it should be
handled with Electrostatic Discharge (ESD) precautions.
Proper grounding would prevent damage further and/or
degradation which may be induced by ESD.
SFH6318T
SFH6319T
LOW CURRENT, HIGH GAIN
OPTOCOUPLER
Package Dimensions in Inches (mm)
.120±.002
(3.05±.05)
NC 1
8 VCC
.240
(6.10)
Anode 2
CL
.154±.002
(.391±.05)
Cathode
3
7 VB
6 V0
Pin 1
.004 (.10)
.008 (.20)
.021
(.53)
.016
(.41)
.192±.005
(4.88±.13)
NC 4
.015±.002
(.38±.05)
40°
5 GND
7°
.058±.005
(1.49±.13)
.008 (.20)
5° max.
.125±.005
(3.18±.13)
.050
(1.27)
typ.
.020±.004
(.15±.10)
2 plcs.
R.010
(.25)
max.
Lead
Coplanarity
±.0015 (.04
max.
TOLERANCE: ± .005 (unless otherwise noted)
Maximum Ratings (25°)
Emitter
Reverse Input Voltage.............................................................. 3 V
Supply and Output Voltage, VCC (pin 8-5), VO (pin 6-5)
SFH6318T ..................................................................–0.5 to 7 V
SFH6319T ................................................................–0.5 to 18 V
Input Power Dissipation ..................................................... 35 mW
Derate Linearly above 50°C
Free Air Temperature................................................ 0.7 mW/°C
Average Input Current......................................................... 20 mA
Peak Input Current .............................................................. 40 mA
(50% Duty Cycle-1 ms pulse width)
Peak Transient Input Current
(tp≤1 µsec, 300 pps) ......................................................... 1.0 A
Detector (Si Photodiode + Photodarlington)
Output Current IO (pin 6)..................................................... 60 mA
Emitter-Base Reverse Voltage (pin 5-7)................................ 0.5 V
Output Power Dissipation................................................. 150 mW
Derate Linearly from 25°C ........................................... 2 mW/°C
Package
Storage Temperature ......................................... –55°C to +125°C
Operating Temperature........................................ –40°C to +85°C
Lead Soldering Temperature (t=10 sec.).............................260°C
Junction Temperature ..........................................................100°C
Ambient Temperature Range............................. –55°C to +100°C
IsolationTest Voltage between
Emitter and Detector............................................ 2500 VACRMS
(refer to climate DIN 40046, part 2, Nov. 74)
Pollution Degree (DIN VDE 0110) ................................................2
Creepage Distance .............................................................≥4 mm
Clearance............................................................................≥4 mm
Comparative Tracking Index
per DIN IEC 112/VDE 0303, part 1 .......................................175
Isolation Resistance
VIO=500 V, TA=25°C RISOL.............................................≥1012Ω
VIO=500 V, TA=100°C RISOL...........................................≥1011Ω
Semiconductor Goup
4–48
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