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PDF M74HC139 Data sheet ( Hoja de datos )
| Número de pieza | M74HC139 | |
| Descripción | DUAL 2 TO 4 DECODER/DEMULTIPLEXER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M74HC139
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
s HIGH SPEED:
tPD = 13ns (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 139
DESCRIPTION
The M74HC139 is an high speed CMOS QUAD
2-INPUT NAND GATE fabricated with silicon gate
C2MOS technology.
The active low enable input can be used for gating
or as a data input for demultiplexing applications.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC139B1R
M74HC139M1R
T&R
M74HC139RM13TR
M74HC139TTR
While the enable input is held high, all four outputs
are high independently of the other inputs.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
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1 page  
M74HC139
CAPACITIVE CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance 5.0
5 10 10 10 pF
CPD Power Dissipation
Capacitance (note 5.0
1)
46
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2(per circuit)
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
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5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet M74HC139.PDF ] | |
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