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74LVC00A の電気的特性と機能

74LVC00AのメーカーはPhilipsです、この部品の機能は「Quad 2-input NAND gate」です。


製品の詳細 ( Datasheet PDF )

部品番号 74LVC00A
部品説明 Quad 2-input NAND gate
メーカ Philips
ロゴ Philips ロゴ 




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74LVC00A Datasheet, 74LVC00A PDF,ピン配置, 機能
INTEGRATED CIRCUITS
74LVC00A
Quad 2-input NAND gate
Product specification
Supersedes data of 1997 Aug 11
IC24 Data Handbook
Philips
Semiconductors
1998 Apr 28

1 Page





74LVC00A pdf, ピン配列
Philips Semiconductors
Quad 2-input NAND gate
Product specification
74LVC00A
LOGIC DIAGRAM (ONE GATE)
A
Y
B
SV00379
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VCC
VI
VO
Tamb
tr, tf
DC supply voltage (for max. speed performance)
DC supply voltage (for low-voltage applications)
DC Input voltage range
DC output voltage range
Operating ambient temperature range in free-air
Input rise and fall times
FUNCTION TABLE
INPUTS
nA
L
L
H
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
nB
L
H
L
H
OUTPUTS
nY
H
H
H
L
CONDITIONS
VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V
LIMITS
MIN MAX
2.7 3.6
1.2 3.6
0 5.5
0 VCC
–40 +85
0 20
0 10
UNIT
V
V
V
V
°C
ns/V
ABSOLUTE MAXIMUM RATINGS1
Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC
DC supply voltage (for max. speed
performance)
–0.5 to +6.5
V
IIK
VI
IOK
VO
IO
IGND, ICC
Tstg
PTOT
DC input diode current
DC input voltage
DC output diode current
DC output voltage
DC output source or sink current
DC VCC or GND current
Storage temperature range
Power dissipation per package
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
VI t0
Note 2
VO uVCC or VO t 0
Note 2
VO = 0 to VCC
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
–50
–0.5 to +5.5
"50
–0.5 to VCC + 0.5
"50
"100
–65 to +150
500
500
mA
V
mA
V
mA
mA
°C
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28
3


3Pages


74LVC00A 電子部品, 半導体
Philips Semiconductors
Quad 2-input NAND gate
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
Product specification
74LVC00A
SOT337-1
1998 Apr 28
6

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
74LVC00A

Quad 2-input NAND gate

Philips
Philips
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