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74LV595 の電気的特性と機能

74LV595のメーカーはPhilipsです、この部品の機能は「8-bit serial-in/serial or parallel-out shift register with output latches 3-State」です。


製品の詳細 ( Datasheet PDF )

部品番号 74LV595
部品説明 8-bit serial-in/serial or parallel-out shift register with output latches 3-State
メーカ Philips
ロゴ Philips ロゴ 




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74LV595 Datasheet, 74LV595 PDF,ピン配置, 機能
INTEGRATED CIRCUITS
74LV595
8-bit serial-in/serial or parallel-out shift
register with output latches (3-State)
Product specification
IC24 Data Handbook
1998 Apr 20
Philips
Semiconductors

1 Page





74LV595 pdf, ピン配列
Philips Semiconductors
8-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
Product specification
74LV595
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
15, 1, 2, 3,
4, 5, 6, 7
Q0 to Q7 Parallel data output
8 GND Ground (0V)
9 Q7’ Serial data output
10 MR Master reset (active LOW)
11 SHCP Shift register clock input
12 STCP Storage register clock input
13 OE Output enable input (active LOW)
14 DS Serial data input
16 VCC Positive supply voltage
FUNCTION TABLE
INPUTS
SHCP
X
STCP
X
OE
L
X°L
XXH
MR
L
L
L
°XLH
DS
X
X
X
H
X ° LHX
° ° LH
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High impedance OFF-state
NC= No change
° = LOW-to-HIGH clock transition
= HIGH-to-LOW transition
X
OUTPUTS
Q7’ Qn
L NC
LL
LZ
Q6’ NC
NC Qn’
Q6’ Qn’
PIN CONFIGURATION
Q1 1
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND 8
16 VCC
15 Q0
14 DS
13 OE
12 STCP
11 SHCP
10 MR
9 Q7’
SV00720
FUNCTION
A LOW level on MR only affects the shift registers
Empty shift register loaded into storage register
Shift register clear. Parallel outputs in high-impedance OFF-states
Logic high level shifted into shift register stage 0. Contents of all shift
register stages shifted through, e.g. previous state of stage 6 (internal
Q6’) appears on the serial output (Q7’)
Contents of shift register stages (internal Qn’) are transferred to the
storage register and parallel output stages
Contents of shift register shifted through. Previous contents of the shift
register are transferred to the storage register and the parallel output
stages
1998 Apr 20
3


3Pages


74LV595 電子部品, 半導体
Philips Semiconductors
8-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
Product specification
74LV595
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNIT
VCC
VI
VO
Tamb
DC supply voltage
Input voltage
Output voltage
Operating ambient temperature range in free
air
See Note1
See DC and AC
characteristics
1.0 3.3 3.6
0 – VCC
0 – VCC
–40 +85
–40 +125
V
V
V
°C
tr, tf Input rise and fall times
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
– 500
– 200 ns/V
– 100
NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC =3.6V.
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC
±IIK
±IOK
±IO
DC supply voltage
DC input diode current
DC output diode current
DC output source or sink current
– standard outputs
– bus driver outputs
VI < –0.5 or VI > VCC + 0.5V
VO < –0.5 or VO > VCC + 0.5V
–0.5V < VO < VCC + 0.5V
–0.5 to +4.6
20
50
25
35
V
mA
mA
mA
±IGND,
±ICC
Tstg
PTOT
DC VCC or GND current for types with
–standard outputs
–bus driver outputs
Storage temperature range
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
–plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
50
70
–65 to +150
750
500
400
mA
°C
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL PARAMETER
TEST CONDITIONS
-40°C to +85°C
MIN TYP1 MAX
VCC = 1.2V
VIH
HIGH level Input
voltage
VCC = 2.0V
VCC = 2.7 to 3.6V
VCC = 1.2V
VIL
LOW level Input
voltage
VCC = 2.0V
VCC = 2.7 to 3.6V
VCC = 1.2V; VI = VIH or VIL; –IO = 100µA
VOH
HIGH level output VCC = 2.0V; VI = VIH or VIL; –IO = 100µA
voltage; all outputs VCC = 2.7V; VI = VIH or VIL; –IO = 100µA
VCC = 3.0V; VI = VIH or VIL; –IO = 100µA
HIGH level output
VOH
voltage;
STANDARD
VCC = 3.0V;VI = VIH or VIL; –IO = 6mA
outputs
0.9
1.4
2.0
1.8
2.5
2.8
2.40
1.2
2.0
2.7
3.0
2.82
0.3
0.6
0.8
-40°C to +125°C
MIN MAX
0.9
1.4
2.0
0.3
0.6
0.8
1.8
2.5
2.8
2.20
UNIT
V
V
V
V
1998 Apr 20
6

6 Page



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部品番号部品説明メーカ
74LV595

8-bit serial-in/serial or parallel-out shift register with output latches 3-State

Philips
Philips


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