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vt82c693 の電気的特性と機能

vt82c693のメーカーはETCです、この部品の機能は「APOLLO PRO-PLUS」です。


製品の詳細 ( Datasheet PDF )

部品番号 vt82c693
部品説明 APOLLO PRO-PLUS
メーカ ETC
ロゴ ETC ロゴ 




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vt82c693 Datasheet, vt82c693 PDF,ピン配置, 機能
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vt82c693 pdf, ピン配列
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VT82C693
VIA VT82C693
APOLLO PRO-PLUS
66 / 100 MHz
Single-Chip Slot-1/Socket 370 North Bridge
for Desktop and Mobile PC Systems
with AGP and PCI
plus Advanced ECC Memory Controller
supporting SDRAM, VCM, EDO, and FPG
AGP / PCI / ISA Mobile and Deep Green PC Ready
GTL+ compliant host bus supports write-combine cycles
Supports separately powered 3.3V (5V tolerant) interface to system memory, AGP, and PCI bus
Modular power management and clock control for mobile system applications
Combine with VIA VT82C596A south bridge chip for state-of-the-art system power management
High Integration
Single chip implementation for 64-bit Slot-1/Socket 370 CPU, 64-bit system memory, 32-bit PCI and 32-bit AGP
interfaces
Apollo Pro-Plus Chipset: VT82C693 system controller and VT82C596A PCI to ISA bridge
Chipset includes UltraDMA-33 EIDE, USB, and Keyboard / PS2-Mouse Interfaces plus RTC / CMOS on chip
High Performance CPU Interface
Supports Slot-1 and Socket 370 (Intel Pentium IITM and CeleronTM) processors
66 / 100 MHz CPU Front Side Bus (FSB)
Built-in PLL (Phase Lock Loop) circuitry for optimal skew control within and between clocking regions
Five outstanding transactions (four In-Order Queue (IOQ) plus one input latch)
Supports WC (Write Combining) cycles
Dynamic deferred transaction support
Sleep mode support
System management interrupt, memory remap and STPCLK mechanism
Preliminary Revision 0.3 December 9, 1998
-1-
Features


3Pages


vt82c693 電子部品, 半導体
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VT82C693
OVERVIEW
The Apollo Pro-Plus is a high performance, cost-effective and energy efficient chip set for the implementation of AGP / PCI / ISA
desktop and notebook personal computer systems from 66 MHz to 100 MHz based on 64-bit Socket 370 and Slot-1 (Intel
Pentium-II and Celeron) super-scalar processors.
Slot-1 or Socket 370
Host CPU
SMIACT#
3D
Graphics
Controller
GCLK
AGP Bus
GCKRUN#
VT82C693
Apollo Pro-Plus
North Bridge
PCLK
PCKRUN#
PCI Bus
492 BGA
SUSCLK,
SUSST1#
ISA
IDE ATA/33
BIOS ROM
USB
Keyboard / Mouse
VT82C596A
Mobile South
324 BGA
HCLK
SMI# / STPCLK# / SLP#
CKE#
Memory Bus
MCLK
HCLK
PCLK
SDRAM
EDO,
or FPG
Clock
Buffer
CPUSTP#
PCISTP#
SMBus
Clock
Generator
Power Plane & Peripheral Control
GPIO and ACPI Events
Figure 1. Apollo Pro-Plus System Block Diagram Using the VT82C596A Mobile South Bridge
The Apollo Pro-Plus chip set consists of the VT82C693 system controller (492 pin BGA) and the VT82C596A PCI to ISA bridge
(324 pin BGA). The system controller provides superior performance between the CPU, DRAM, AGP bus, and PCI bus with
pipelined, burst, and concurrent operation.
The VT82C693 supports eight banks of DRAMs up to 1GB. The DRAM controller supports standard Fast Page Mode (FPM)
DRAM, EDO-DRAM, and Synchronous DRAM (SDRAM), in a flexible mix / match manner. The Synchronous DRAM interface
allows zero wait state bursting between the DRAM and the data buffers at 100 MHz. The eight banks of DRAM can be composed
of an arbitrary mixture of 1M / 2M / 4M / 8M / 16MxN DRAMs. The DRAM controller also supports optional ECC (single-bit
error correction and multi-bit detection) or EC (error checking) capability separately selectable on a bank-by-bank basis. The
DRAM controller can run at either the host CPU bus frequency (66 /100 MHz) or at the AGP bus frequency (66 MHz) with built-in
PLL timing control.
The VT82C693 system controller also supports full AGP v2.0 capability for maximum bus utilization including 2x mode transfers,
SBA (SideBand Addressing), Flush/Fence commands, and pipelined grants. An eight level request queue plus a four level post-
write request queue with thirty-two and sixteen quadwords of read and write data FIFO's respectively are included for deep
pipelined and split AGP transactions. A single-level GART TLB with 16 full associative entries and flexible CPU / AGP / PCI
remapping control is also provided for operation under protected mode operating environments. Both Windows-95 VXD and
Windows-98 / NT5 miniport drivers are supported for interoperability with major AGP-based 3D and DVD-capable multimedia
accelerators.
The VT82C693 supports two 32-bit 3.3 / 5V system buses (one AGP and one PCI) that are synchronous / pseudo-synchronous to
the CPU bus. The chip also contains a built-in bus-to-bus bridge to allow simultaneous concurrent operations on each bus. Five
levels (doublewords) of post write buffers are included to allow for concurrent CPU and PCI operation. For PCI master operation,
forty-eight levels (doublewords) of post write buffers and sixteen levels (doublewords) of prefetch buffers are included for
concurrent PCI bus and DRAM/cache accesses. The chip also supports enhanced PCI bus commands such as Memory-Read-Line,
Memory-Read-Multiple and Memory-Write-Invalid commands to minimize snoop overhead. In addition, advanced features are
supported such as snoop ahead, snoop filtering, L1 write-back forward to PCI master, and L1 write-back merged with PCI post
Preliminary Revision 0.3 December 9, 1998
-4-
Overview

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
VT82C691

Apollo Pro 66/100 MHZ Single-chip Socket-8/slot-1 North Bridge

VIA Technologies
VIA Technologies
vt82c693

APOLLO PRO-PLUS

ETC
ETC
VT82C693A

Single-Chip Slot-1 / Socket-370 North Bridge

VIA
VIA


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