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PZT65 の電気的特性と機能

PZT65のメーカーはON Semiconductorです、この部品の機能は「HIGH CURRENT NPN SILICON TRANSISTOR SURFACE MOUNT」です。


製品の詳細 ( Datasheet PDF )

部品番号 PZT65
部品説明 HIGH CURRENT NPN SILICON TRANSISTOR SURFACE MOUNT
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PZT65 Datasheet, PZT65 PDF,ピン配置, 機能
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
NPN Silicon Planar
Epitaxial Transistor
This NPN Silicon Epitaxial transistor is designed for use in industrial and consumer
applications. The device is housed in the SOT–223 package which is designed for
medium power surface mount applications.
High Current: 2.0 Amp
The SOT–223 package can be soldered using wave or reflow.
SOT–223 package ensures level mounting, resulting in improved thermal
conduction, and allows visual inspection of soldered joints. The formed
leads absorb thermal stress during soldering, eliminating the possibility
of damage to the die.
Available in 12 mm Tape and Reel
Use PZT651T1 to order the 7 inch/1000 unit reel
Use PZT651T3 to order the 13 inch/4000 unit reel
PNP Complement is PZT751T1
COLLECTOR 2,4
BASE
1
EMITTER 3
Order this document
by PZT651T1/D
PZT651T1
Motorola Preferred Device
SOT–223 PACKAGE
HIGH CURRENT
NPN SILICON
TRANSISTOR
SURFACE MOUNT
4
1
2
3
CASE 318E–04, STYLE 1
TO–261AA
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Collector–Emitter Voltage
Collector–Base Voltage
Emitter–Base Voltage
Collector Current
Total Power Dissipation @ TA = 25°C(1)
Derate above 25°C
VCEO
VCBO
VEBO
IC
PD
Storage Temperature Range
Junction Temperature
DEVICE MARKING
Tstg
TJ
651
THERMAL CHARACTERISTICS
Characteristic
Symbol
Thermal Resistance from Junction–to–Ambient in Free Air
Maximum Temperature for Soldering Purposes
Time in Solder Bath
RθJA
TL
1. Device mounted on a FR–4 glass epoxy printed circuit board using minimum recommended footprint.
Value
60
80
5.0
2.0
0.8
6.4
– 65 to 150
150
Max
156
260
10
Unit
Vdc
Vdc
Vdc
Adc
Watts
mW/°C
°C
°C
Unit
°C/W
°C
Sec
Preferred devices are Motorola recommended choices for future use and best overall value.
Thermal Clad is a trademark of the Bergquist Company
REV 1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
© Motorola, Inc. 1996
1

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PZT65 pdf, ピン配列
PZT651T1
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
0.091
2.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
0.248
6.3
inches
mm
SOT–223 POWER DISSIPATION
The power dissipation of the SOT–223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–223 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
PD = 150°C – 25°C = 1.5 watts
83.3°C/W
The 83.3°C/W for the SOT–223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 1.5 watts. There are
other alternatives to achieving higher power dissipation from
the SOT–223 package. One is to increase the area of the
collector pad. By increasing the area of the collector pad, the
power dissipation can be increased. Although the power
dissipation can almost be doubled with this method, area is
taken up on the printed circuit board which can defeat the
purpose of using surface mount technology. A graph of RθJA
versus collector pad area is shown in Figure 1.
160
Board Material = 0.0625
140 G–10/FR–4, 2 oz Copper
0.8 Watts
TA = 25°C
° 120
100
1.25 Watts*
1.5 Watts
*Mounted on the DPAK footprint
80
0.0 0.2 0.4
0.6
0.8 1.0
A, Area (square inches)
Figure 1. Thermal Resistance versus Collector
Pad Area for the SOT–223 Package (Typical)
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core board,
the power dissipation can be doubled using the same footprint.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3


3Pages


PZT65 電子部品, 半導体
PZT651T1
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
MFAX: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
*PZT651T1/D*6 Motorola Small–Signal Transistors, FETs and Diodes DPevZiTc6e5D1Ta1t/aD

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共有リンク

Link :


部品番号部品説明メーカ
PZT65

HIGH CURRENT NPN SILICON TRANSISTOR SURFACE MOUNT

ON Semiconductor
ON Semiconductor
PZT651

NPN Silicon Planar Epitaxial Transistor

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PZT651T1

NPN Silicon Planar Epitaxial Transistor

Motorola Semiconductors
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PZT651T1G

NPN Silicon Planar Epitaxial Transistor

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