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VCH2373APWDHのメーカーはNXP Semiconductorsです、この部品の機能は「Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor 3-State」です。 |
部品番号 | VCH2373APWDH |
| |
部品説明 | Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor 3-State | ||
メーカ | NXP Semiconductors | ||
ロゴ | |||
このページの下部にプレビューとVCH2373APWDHダウンロード(pdfファイル)リンクがあります。 Total 12 pages
INTEGRATED CIRCUITS
74LVC2373A
74LVCH2373A
Octal D-type transparent latch with 5-volt
tolerant inputs/outputs; damping resistor
(3-State)
Product specification
IC24 Data Handbook
1997 Mar 12
Philips
Semiconductors
1 Page Philips Semiconductors
Octal D-type transparent latch with 5-volt tolerant
inputs/outputs; damping resistor (3-State)
Product specification
74LVC2373A
74LVCH2373A
PIN CONFIGURATION
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
SV00657
PIN DESCRIPTION
PIN NUMBER SYMBOL
1 OE
2, 5, 6, 9, 12,
15, 16, 19
Q0–Q7
3, 4, 7, 8, 13,
14, 17, 18
D0–D7
10 GND
11 LE
20 VCC
FUNCTION
Output enable input (active LOW)
3-State latch outputs
Data inputs
Ground (0V)
Latch enable input (active HIGH)
Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
11
C1
1
EN1
3
1D
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
SV00659
LOGIC SYMBOL
3 D0
4 D1
7 D2
8 D3
13 D4
14 D5
17 D6
18 D7
11
LE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
OE
1
2
5
6
9
12
15
16
19
FUNCTIONAL DIAGRAM
SV00658
3 D0
4 D1
7 D2
8 D3
13 D4
14 D5
17 D6
18 D7
LATCH
1 to 8
Q0 2
Q1 5
Q2 6
3–STATE
OUTPUTS
Q3 9
Q4 12
Q5 15
Q6 16
Q7 19
11 LE
1 OE
SV00660
FUNCTION TABLE
OPERATING
MODES
INPUTS
INTERNAL OUTPUTS
OE LE Dn LATCHES Q0 to Q7
Enable and
read register
(transparent
mode)
LHL
L HH
L
H
L
H
Latch and read L
L
I
register
LLh
L
H
L
H
Latch register
and disable
outputs
HL
I
HL h
L
H
Z
Z
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW
LE transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the HIGH-to-LOW
LE transition
X = Don’t care
Z = High impedance OFF-state
1997 Mar 12
3
3Pages Philips Semiconductors
Octal D-type transparent latch with 5-volt tolerant
inputs/outputs; damping resistor (3-State)
Product specification
74LVC2373A
74LVCH2373A
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF
SYMBOL
PARAMETER
WAVEFORM
tPHL/tPLH
Propagation delay
Dn to Qn
Figures 1, 5
tPHL/tPLH
Propagation delay
LE to Qn
Figures 2, 5
tPZH/tPZL
3-State output enable time
OE to Qn
Figures 3, 5
tPHZ/tPLZ
3-State output disble time
OE to Qn
Figures 3, 5
tW LE pulse width HIGH
tsu
Set-up time
Dn to LE
Figure 2
Figure 4
th
Hold time
Dn to LE
Figure 4
NOTE:
1. These typical values are at VCC = 3.3V and Tamb = 25°C.
LIMITS
VCC = 3.3V ±0.3V
MIN TYP1 MAX
VCC = 2.7V
MIN MAX
1.5 – 8.5 1.5 9.5
1.5 – 9.5 1.5 11
1.5 – 9.0 1.5 11
1.5 – 6.0 1.5 6.5
4.0 –
– 4.0 –
2.0 –
– 3.0 –
2.0 –
– 3.0 –
VCC = 1.2V
TYP
–
–
–
–
–
–
–
UNIT
ns
ns
ns
ns
ns
ns
ns
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V
VM = 0.5 S VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the output load.
VX = VOL + 0.3 V at VCC ≥ 2.7 V
VX – VOL + 0.1 ⋅ VCC at VCC < 2.7 V
VY = VOH – 0.3 V at VCC ≥ 2.7 V
VY = VOH – 0.1 ⋅ VCC at VCC < 2.7 V
VI
INPUTS
VM
GND
tPHL
VOH
tPLH
OUTPUTS
VM
VOL
SV00690
Figure 1. nput (Dn) to output (Qn) propagation delays
VI
LE INPUT
VM
GND
tW
VOH
tPHL
tPLH
Qn OUTPUT
VOL
VM
SV00691
Figure 2. Latch enable input (LE) pulse width, the latch enable
input to output (Qn) propagation delays
1997 Mar 12
6
6 Page | |||
ページ | 合計 : 12 ページ | ||
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部品番号 | 部品説明 | メーカ |
VCH2373APWDH | Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor 3-State | NXP Semiconductors |