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V827464K24S の電気的特性と機能

V827464K24SのメーカーはMosel Vitelic Corpです、この部品の機能は「2.5 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE」です。


製品の詳細 ( Datasheet PDF )

部品番号 V827464K24S
部品説明 2.5 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE
メーカ Mosel Vitelic Corp
ロゴ Mosel Vitelic  Corp ロゴ 




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V827464K24S Datasheet, V827464K24S PDF,ピン配置, 機能
MOSEL VITELIC
V827464K24S
2.5 VOLT 64M x 72 HIGH PERFORMANCE
UNBUFFERED ECC DDR SDRAM MODULE
PRELIMINARY
Features
184 Pin Unbuffered 67,108,864 x 72 bit
Organization DDR SDRAM Modules
Utilizes High Performance 32M x 8 DDR
SDRAM in TSOPII-66 Packages
Single +2.5V (± 0.2V) Power Supply
Programmable CAS Latency, Burst Length, and
Wrap Sequence (Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
All Inputs, Outputs are SSTL-2 Compatible
8196 Refresh Cycles every 64 ms
Serial Presence Detect (SPD)
DDR SDRAM Performance
Component Used -6
-7 -75 -8
tCK Clock Frequency
(max.)
166 143 133 125
(PC333) (PC266A) (PC266B) (PC200)
tAC Clock Access Time
CAS Latency = 2.5
6
7 7.5 8
Description
The V827464K24S memory module is organized
67,108,864 x 72 bits in a 184 pin memory module.
The 64M x 72 memory module uses 18 Mosel-
Vitelic 32M x 8 DDR SDRAM. The x72 modules are
ideal for use in high performance computer systems
where increased memory density and fast access
times are required.
Module Speed
A1 PC1600 (100MHz @ CL2)
B0 PC2100B (133MHz @ CL2.5)
B1 PC2100A (133MHz @ CL2)
C0 PC2700 (166MHz @ CL2.5)
V827464K24S Rev. 1.1 September 2002
1

1 Page





V827464K24S pdf, ピン配列
MOSEL VITELIC
V827464K24S
Block Diagram
DQS0
DM0
DQS1
DM1
DQS2
DM2
DQS3
DM3
DQS8
DM8
CS0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
SCL
WP
Serial PD
A0 A1 A2
SA0 SA1 SA2
CS DQS
D0
CS DQS
D1
CS DQS
D2
CS DQS
D3
CS DQS
D8
SDA
CS1
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
DQS4
DM4
CS DQS
D9
DQS5
DM5
CS DQS
D10
CS DQS
DQS6
DM6
D11
CS DQS
D12
DQS7
DM7
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
CS DQS
D17
* Clock Wiring
Clock
Input
DDR SDRAMs
CK0/CK0
CK1/CK1
CK2/CK2
6 DDR SDRAMs
6 DDR SDRAMs
6 DDR SDRAMs
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
CS DQS
D4
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
CS DQS
D13
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
CS DQS
D5
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
CS DQS
D14
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
CS DQS
D6
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
CS DQS
D15
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DM
I/O 7
I/O 6
I/O 1
I/O 0
I/O 5
I/O 4
I/O 3
I/O 2
CS DQS
D7
DM
I/O 0
I/O 1
I/O 6
I/O 7
I/O 2
I/O 3
I/O 4
I/O 5
CS DQS
D16
*Clock Net Wiring
D3/D0/D5
R=120
CK0/1/2
Card
Edge
*D8, D17 is assigned for ECC Comp.
D4/D1/D6
D8/D2/D7
D17/D9/D14
D12/D10/D15
D13/D11/D16
BA0 - BA1
A0 - A12
RAS
CAS
CKE1
CKE0
WE
BA0-BA1: DDR SDRAMs D0 - D17
A0-A12: DDR SDRAMs D0 - D17
RAS: DDR SDRAMs D0 - D17 VDDSPD
CAS: DDR SDRAMs D0 - D17 VDD/VDDQ
CKE: DDR SDRAMs D9 - D17
CKE: DDR SDRAMs D0 - D8
WE: DDR SDRAMs D0 - D17
VREF
VSS
VDDID
Notes:
1. DQ-to-I/O wiring is shown as recom-
mended but may be changed.
SPD 2. DQ/DQS/DM/CKE/CS relationships must
D0 - D17 be maintained as shown.
3. DQ, DQS, DM/DQS resistors: 22 Ohms +
D0 - D17 5%.
D0 - D17 4. VDDID strap connections
D0 - D17 (for memory device VDD, VDDQ):
STRAP OUT (OPEN): VDD = VDDQ
Strap: see Note 4 STRAP IN (VSS): VDD VDDQ.
5. BAx, Ax, RAS, CAS, WE resistors: 3
Ohms + 5%
V827464K24S Rev.1.1 September 2002
3


3Pages


V827464K24S 電子部品, 半導体
MOSEL VITELIC
V827464K24S
Serial Presence Detect Information (cont.)
Function Supported
Hex value
Byte #
Function described
A1 B0 B1 C0 A1 B0 B1 C0
28 Minimum row activate to row active delay(=tRRD)
29 Minimum RAS to CAS delay(=tRCD)
30 Minimum active to precharge time(=tRAS)
31 Module ROW density
15ns 15ns 15ns 12ns 3Ch 3Ch 3Ch 30h
20ns 20ns 20ns 18ns 50h 50h 50h 48h
50ns 45ns 45ns 42ns 32h 2Dh 2Dh 2Ah
256MB
40h
32 Command and address signal input setup time
1.1ns 0.9ns 0.9ns 0.75ns B0h 90h 90h 75h
33 Command and address signal input hold time
1.1ns 0.9ns 0.9ns 0.75ns B0h 90h 90h 75h
34 Data signal input setup time
0.6ns 0.5ns 0.5ns 0.45ns 60h 50h 50h 45h
35 Data signal input hold time
0.6ns 0.5ns 0.5ns 0.45ns 60h 50h 50h 45h
36-40 Superset information (may be used in future)
00h
41 SDRAM device minimum active to active/auto-refresh time
(=tRC)
70ns 65ns 65ns 60ns 46h
42 SDRAM device minimum active to autorefresh to active/auto-re- 80ns 75ns 75ns 72ns 50h
fresh time (=tRFC)
43 SDRAM device maximum device cycle time (=tCK MAX)
12ns 12ns 12ns 12ns 30h
44 SDRAM device maximum skew between DQS and DQ signals 0.6ns 0.5ns 0.5ns 0.45ns 3Ch
(=tDQSQ)
45 SDRAM device maximum read datahold skew factor (=tQHS)
1ns 0.75ns 0.75ns 0.60ns A0h
46-61 Superset information (may be used in future)
-
41h 41h
4Bh 4Bh
30h 30h
32h 32h
75h 75h
00h
3Ch
48h
30h
2Dh
60h
62 SPD data revision code
Initial release
00h
63 Checksum for Bytes 0 ~ 62
- FAh 35h 05h 5Eh
64 Manufacturer JEDEC ID code
Mosel Vitelic
40h
65 -71 ....... Manufacturer JEDEC ID code
00h
72 Manufacturing location
02=Taiwan 05=China 0A=S-CH
73-90 Module part number (ASCII)
V827464K24S
91 Manufacturer revison code (For PCB)
0 00
92 Manufacturer revison code (For component)
0 00
93 Manufacturing date (Week)
--
94 Manufacturing date (Year)
--
95~98 Assembly serial #
--
99~127 Manufacturer specific data (may be used in future)
Undefined
00h
128~25 Open for customer use
5
Undefined
00h
V827464K24S Rev. 1.1 September 2002
6

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部品番号部品説明メーカ
V827464K24S

2.5 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE

Mosel Vitelic  Corp
Mosel Vitelic Corp


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