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V53C806H50のメーカーはMosel Vitelic Corpです、この部品の機能は「HIGH PERFORMANCE 1M x 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM」です。 |
部品番号 | V53C806H50 |
| |
部品説明 | HIGH PERFORMANCE 1M x 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM | ||
メーカ | Mosel Vitelic Corp | ||
ロゴ | |||
このページの下部にプレビューとV53C806H50ダウンロード(pdfファイル)リンクがあります。 Total 18 pages
MOSEL VITELIC
V53C806H
HIGH PERFORMANCE
1M x 8 BIT FAST PAGE MODE
CMOS DYNAMIC RAM
PRELIMINARY
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC)
Max. Column Address Access Time, (tCAA)
Min. Fast Page Mode Cycle Time, (tPC)
Min. Read/Write Cycle Time, (tRC)
Features
s 1M x 8-bit organization
s Fast Page Mode for a sustained data rate of
43 MHz
s RAS access time: 40, 45, 50, 60 ns
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh capability
s Refresh Interval: 1024 cycle/16 ms
s Available in 28-pin 400 mil SOJ package
s Single +5V ±10% Power Supply
s TTL Interface
40
40 ns
20 ns
23 ns
75 ns
45
45 ns
22 ns
25 ns
80 ns
50
50 ns
24 ns
28 ns
90 ns
60
60 ns
30 ns
40 ns
120 ns
Description
The V53C806H is a ultra high speed 1,048,576 x
8 bit CMOS dynamic random access memory. The
V53C806H offers a combination of features: Fast
Page Mode for high data bandwidth, and Low
CMOS standby current.
All inputs and outputs are TTL compatible. Input
and output capacitances are significantly lowered to
allow increased system performance. Fast Page
Mode operation allows random access of up to
1024 x 8 bits within a row with cycle times as fast as
23 ns. Because of static circuitry, the CAS clock is
not in the critical timing path. The flow-through col-
umn address latches allow address pipelining while
relaxing many critical system timing requirements.
The V53C806H is ideally suited for graphics, dig-
ital signal processing and high-performance com-
puting systems.
Device Usage Chart
Operating
Temperature
Range
0°C to 70 °C
Package Outline
K
•
Access Time (ns)
40 45 50 60
••••
Power
Std.
•
Temperature
Mark
Blank
V53C806H Rev. 1.6 April 1998
1
1 Page MOSEL VITELIC
Block Diagram
OE
WE
CAS
RAS RAS CLOCK
GENERATOR
1M x 8
V53C806H
CAS CLOCK
GENERATOR
WE CLOCK
GENERATOR
OE CLOCK
GENERATOR
VCC
VSS
REFRESH
COUNTER
10
A0
A1
•
•
•
A8
A9
Y0 -Y9
DATA I/O BUS
COLUMN DECODERS
SENSE AMPLIFIERS
1024 x 8
X 0 -X9
1024
MEMORY
ARRAY
1024 x 1024 x 8
I/O
BUFFER
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
806H-03
V53C806H Rev. 1.6 April 1998
3
3Pages MOSEL VITELIC
V53C806H
AC Characteristics (Cont’d)
40 45 50 60
# Symbol Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit Notes
30 tWCR
Write Command Hold Time
30
35
40
45 ns
from RAS
31 tRWL
Write Command to RAS Lead Time 12
13
14
15 ns
32 tDS
Data in Setup Time
0 0 0 0 ns 14
33 tDH
Data in Hold Time
5 6 7 10 ns 14
34 tWOH
Write to OE Hold Time
6 7 8 10 ns 14
35 tOED
OE to Data Delay Time
6 7 8 10 ns 14
36 tRWC
Read-Modify-Write Cycle Time
110
115
130
170
ns
37 tRRW
Read-Modify-Write Cycle RAS Pulse 75
80
87 105 ns
Width
38 tCWD
CAS to WE Delay
30 32 34 40 ns 12
39 tRWD
RAS to WE Delay in Read-Modify- 58
62
68
85 ns 12
Write Cycle
40 tCRW
CAS Pulse Width (RMW)
48 50 52 65 ns
41 tAWD
Col. Address to WE Delay
38
41
42
58 ns 12
42 tPC
Fast Page Mode
23 25 28 40 ns
Read or Write Cycle Time
43 tCP
CAS Precharge Time
5 6 7 8 ns
44 tCAR
Column Address to RAS Setup
20
22
24
30 ns
Time
45 tCAP
Access Time from Column
Precharge
23
25
27
34 ns
7
46 tDHR
Data in Hold Time Referenced
30
35
40
50 ns
to RAS
47 tCSR
CAS Setup Time CAS-before-RAS 10
10
10
10 ns
Refresh
48 tRPC
49 tCHR
RAS to CAS Precharge Time
CAS Hold Time CAS-before-RAS
Refresh
0
8
0 0 0 ns
10 12 15 ns
50 tPCM
Fast Page Mode Read-Modify-Write 60
65
70
85 ns
Cycle Time
51 tT
52 tREF
Transition Time (Rise and Fall)
Refresh Interval (1024 Cycles)
3 50 3 50 3 50 3 50 ns 15
16 16 16 16 ms
V53C806H Rev. 1.6 April 1998
6
6 Page | |||
ページ | 合計 : 18 ページ | ||
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PDF ダウンロード | [ V53C806H50 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
V53C806H50 | HIGH PERFORMANCE 1M x 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM | Mosel Vitelic Corp |