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V53C316405A60 の電気的特性と機能

V53C316405A60のメーカーはMosel Vitelic Corpです、この部品の機能は「3.3 VOLT 4M x 4 EDO PAGE MODE CMOS DYNAMIC RAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 V53C316405A60
部品説明 3.3 VOLT 4M x 4 EDO PAGE MODE CMOS DYNAMIC RAM
メーカ Mosel Vitelic Corp
ロゴ Mosel Vitelic  Corp ロゴ 




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V53C316405A60 Datasheet, V53C316405A60 PDF,ピン配置, 機能
MOSEL VITELIC
V53C316405A
3.3 VOLT 4M x 4 EDO PAGE MODE
CMOS DYNAMIC RAM
V53C316405A
Max. RAS Access Time, (tRAC)
Max. Column Address Access Time, (tCAA)
Min. Extended Data Out Page Mode Cycle Time, (tPC)
Min. Read/Write Cycle Time, (tRC)
50
50 ns
25 ns
20 ns
84 ns
60
60 ns
30 ns
25 ns
104 ns
Features
s 4M x 4-bit organization
s EDO Page Mode for a sustained data rate
of 50 MHz
s RAS access time: 50, 60 ns
s Low power dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh and Hidden Refresh
s Refresh Interval: 4096 cycles/64 ms
s Available in 24/26-pin 300 mil SOJ,
and 24/26-pin 300 mil TSOP-II
s Single +3.3V ±0.3V Power Supply
s TTL Interface
Description
The V53C316405A is a 4,194,304 x 4 bit high-
performance CMOS dynamic random access mem-
ory. The V53C316405A offers Page mode opera-
tion with Extended Data Output. The V53C316405A
has asymmetric address, 12-bit row and 10-bit col-
umn.
All inputs are TTL compatible. EDO Page Mode
operation allows random access up to 1024 x 4 bits,
within a page, with cycle times as short as 20ns.
These features make the V53C316405A ideally
suited for a wide variety of high performance com-
puter systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
0°C to 70°C
Package Outline
KT
••
V53C316405A Rev. 1.2 March 1998
Access Time (ns)
50 60
••
1
Power
Std.
Temperature
Mark
Blank

1 Page





V53C316405A60 pdf, ピン配列
MOSEL VITELIC
Absolute Maximum Ratings*
Operating temperature range ..................0 to 70 °C
Storage temperature range ............... -55 to 150 °C
Input/output voltage .... -0.5 to min (VCC+0.5, 4.6) V
Power supply voltage .......................... -1.0 to 4.6 V
Power dissipation .......................................... 0.5 W
Data out current (short circuit) ...................... 50 mA
*Note: Operation above Absolute Maximum Ratings can
adversely affect device reliability.
V53C316405A
Capacitance*
TA = 25°C, VCC = 3.3 V ± 0.3V, VSS = 0 V
Symbol Parameter
Typ. Max.
CIN1
CIN2
COUT
Address Input
RAS, CAS, WE, OE
Data Input/Output
5
7
7
*Note: Capacitance is sampled and not 100% tested.
Unit
pF
pF
pF
Block Diagram
4096 x 4
I/O1 I/O2 I/O3 I/O4
WE
CAS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
RAS
No. 2 Clock
Generator
10 Column
Address
Buffers (10)
Refresh
Controller
Refresh
Counter (12)
12
12 Row
Address
Buffers (11)
No. 1 Clock
Generator
Data In
Buffer
4
Data Out
Buffer
OE
4
10 Column
Decoder
Sense Amplifier
I/O Gating
4
1024
x4
12
Row
Decoder
4096
Memory Array
4096 x 1024 x 4
Voltage Down
Generator
VCC
VCC (internal)
311640502-04
V53C316405A Rev. 1.2 March 1998
3


3Pages


V53C316405A60 電子部品, 半導体
MOSEL VITELIC
AC Characteristics(5,6)
TA = 0 to 70 ˚C,VCC = 3.3 V ± 0.3V, tT = 2 ns
# Symbol
Parameter
Write Cycle
31 tWCH
Write command hold time
32 tWP
Write command pulse width
33 tWCS
Write command setup time
34 tRWL
Write command to RAS lead time
35 tCWL
Write command to CAS lead time
36 tDS
Data setup time
37 tDH
Data hold time
Read-modify-Write Cycle
38 tRWC
Read-write cycle time
39 tRWD
RAS to WE delay time
40 tCWD
CAS to WE delay time
41 tAWD
Column address to WE delay time
42 tOEH
OE command hold time
EDO Page Mode Cycle
43 tPC
EDO page mode cycle time
44 tCP
CAS precharge time
45 tCPA
Access time from CAS precharge
46 tCOH
Output data hold time
47 tRAS
RAS pulse width in EDO mode
48 tRHPC
CAS precharge to RAS Delay
tDES
OE setup time prior to CAS
EDO Page Mode Read-modify-Write Cycle
49 tPRWC
EDO page mode read-write cycle time
50 tCPWD
CAS precharge to WE
CAS-before-RAS Refresh Cycle
51 tCSR
52 tCHR
53 tRPC
54 tWRP
55 tWRH
CAS setup time
CAS hold time
RAS to CAS precharge time
Write to RAS precharge time
Write hold time referenced to RAS
V53C316405A
-50
min. max.
-60
min. max. Unit Note
8 – 10 – ns
8 – 10 – ns
0 – 0 – ns 15
13 – 15 – ns
13 – 15 – ns
0 – 0 – ns 16
8 – 10 – ns 16
113 – 138 – ns
64 – 77 – ns 15
27 – 32 – ns 15
39 – 47 – ns 15
10 – 13 – ns
20 – 25 – ns
8 – 10 – ns
– 27 – 32 ns 7
5 – 5 – ns
50 200k 60 200k ns
27 – 32 – ns
5 5 ns
58 – 68 – ns
41 – 49 – ns
10 – 10 – ns
10 – 10 – ns
5 – 5 – ns
10 – 10 – ns
10 – 10 – ns
V53C316405A Rev. 1.2 March 1998
6

6 Page



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部品番号部品説明メーカ
V53C316405A60

3.3 VOLT 4M x 4 EDO PAGE MODE CMOS DYNAMIC RAM

Mosel Vitelic  Corp
Mosel Vitelic Corp


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