PDF V437464C24V Data sheet ( Hoja de datos )

Número de pieza	V437464C24V
Descripción	3.3 VOLT 64M x 72 HIGH PERFORMANCE PC133 REGISTERED PLL ECC SDRAM MODULE
Fabricantes	Mosel Vitelic Corp
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No Preview Available ! MOSEL VITELIC V437464C24V 3.3 VOLT 64M x 72 HIGH PERFORMANCE PC133 REGISTERED PLL ECC SDRAM MODULE PRELIMINARY Features s 168 Pin Registered ECC 67,108,864 x 72 bit Oganization SDRAM Modules s Utilizes High Performance 64M x 4 SDRAM in TSOPII-54 Packages s Fully PC Board Layout Compatible to INTEL’S Rev 1.2 Module Specification s Single +3.3V (± 0.3V) Power Supply s Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave) s Auto Refresh (CBR) and Self Refresh s All Inputs, Outputs are LVTTL Compatible s 8192 Refresh Cycles every 64 ms s Serial Present Detect (SPD) s SDRAM Performance Description The V437464C24V memory module is organized 67,108,864 x 72 bits in a 168 pin dual in line memory module (DIMM). The 64M x 72 registered DIMM uses 18 Mosel-Vitelic 64M x 4 ECC SDRAM. The x72 registered modules are ideal for use in high performance computer systems where increased memory density and fast access times are required. Key Component Timing Parameters -7PC -7 -8PC Units tCK Clock Frequency (max.) tAC Clock Access Time CAS Latency = 3 tAC Clock Access Time CAS Latency = 2 143 143 125 MHz 5.4 5.4 6 ns 5.4 6 6 ns s Module Frequency vs AC Parameter Frequency V437464C24V 133 MHz (PC) V437464C24V 133 MHz V437464C24V 100 MHz (PC) CL (CAS Latency) 2 3 2 tRCD 2 3 2 tRP 2 3 2 tRC Unit 8 CLK 8 CLK 7 CLK V437464C24V Rev.1.0 January 2002 1 1 page MOSEL VITELIC SPD-Table Byte Num- ber Function Described 28 Minimum Row Active to Row Active Delay tRRD 29 Minimum RAS to CAS Delay tRCD 30 Minimum RAS Pulse Width tRAS 31 Module Bank Density (Per Bank) 32 SDRAM Input Setup Time 33 SDRAM Input Hold Time 34 SDRAM Data Input Setup Time 35 SDRAM Data Input Hold Time 62-61 Superset Information (May be used in Fu- ture) 62 SPD Revision 63 Checksum for Bytes 0 - 62 64 Manufacturer’s JEDEC ID Code 65-71 Manufacturer’s JEDEC ID Code (cont.) 72 Manufacturing Location 73-90 Module Part Number (ASCII) 91-92 PCB Identification Code 93 Assembly Manufacturing Date (Year) 94 Assembly Manufacturing Date (Week) 95-98 Assembly Serial Number 99-125 Reserved 126 Intel Specification for Frequency 127 Supported Frequency 128+ Unused Storage Location SPD Entry Value 14 ns/15 ns/16 ns 15 ns/20 ns 42 ns/45 ns 512 MByte 1.5 ns/2.0 ns 0.8 ns/1.0 ns 1.5 ns/2.0 ns 0.8 ns/1.0 ns Revision 2/1.2 Mosel Vitelic V437464C24V -75PC 0E Hex Value -75 0F -10PC 10 0F 14 14 2A 2D 2D 80 80 80 15 15 20 08 08 10 15 15 20 08 08 10 00 00 00 02 02 12 67 AE 1A 40 40 40 00 00 00 00 00 00 64 64 64 00 00 00 V437464C24V Rev. 1.0 January 2002 5 5 Page MOSEL VITELIC Label Information V437464C24V Part Number Criteria of PC100 or PC133 (refer to MVI datasheet) DIMM manufacture date code Module Density MOSEL VITELIC V437464C24VXXX-XX 512MB CLX PC133R-XXX-542-A XXXX-XXXXXXX Assembly in Taiwan CAS Latency 2=CL2 3=CL3 PC133 R -XXX 54 2 A REGISTERED DIMM CL= 3 or 2 (CLK) tRCD= 3 or 2 (CLK) tRP= 3 or 2 (CLK) Gerber file Intel PC100 x4 Based JEDEC SPD Revision 2 tAC = 5.4 ns V437464C24V Rev. 1.0 January 2002 11 11 Page

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