|
|
PDF SBPH400-3 Data sheet ( Hoja de datos )
| Número de pieza | SBPH400-3 | |
| Descripción | IEEE1394 3-Port 400Mbps Physical Layer | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SBPH400-3 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
® SBPH400-3
IEEE1394 3-Port 400Mbps Physical Layer
PRELIMINARY DATA
s FEATURES
s 3 ports fully compliant with IEEE 1394-1995
cable environment specification
s Fully implements IEEE P1394a D2.0
proposal
s S100, S200 and S400 speeds
s IEEE P1394a proposal PHY-LINK interface
s IEEE P1394a proposal Suspend/Resume
s OHCI support
s Per port disable
s Automatic power saving
s Optional isolation support
s IEEE P1394a
enhancements
proposal
arbitration
s IEEE P1394a proposal register set and
remote register read
s Advanced Data-Strobe clock and data
recovery
s Digital delay-lock loop technology - no
filtering capacitors
s Built-in self-test (BIST) of analog and digital
port logic
s JTAG Test Access Port
s 3.3V supply
s 80 pin plastic TQFP package
s APPLICATIONS
s Host processor interface
s Host processor adapter cards
s Digital set-top box
s Digital Video Recorder/ Player
s Repeaters
P1394a Link interface
Link layer interface logic
Reset and
arbitration
Built-in
self test
Port
logic
Port
logic
Port
logic
1394 cable 1394 cable 1394 cable
interface
interface interface
@400 Mbps @400 Mbps @400 Mbps
16 March 1998
The information in this datasheet is subject to change
42 1697 05
1 page  
Figure 1.1 SBPH400-3 block diagram
SBPH400-3
D[0:7]
Ctl[0:1]
LReq
SClk
CPS
LPS
ISO
CMC
LKON
PC[0:2]
RESET#
LACT
PDISABLE
QX1
CLK24/QX0
TCK
TRST#
TMS
TDI
TDO
TESTMODE
TESTENABLE
SCI[2:0]
SCO[2:0]
LINK
Interface
I/O
Data
Encoder/
Decoder
Arbitration and
Control State Machine
Logic
Cable Media Interface
Strb_Tx
Data_Tx
Strb_Rx
Data_Rx
Speed_Tx
Transmitter
&
Receiver
St rb_En
Data_En
Arb_A_Rx
Arb_B_Rx
Speed_Rx
Port_Status
Port 1
(Driver/Receiver,
Arb. Comparator,
Port_Status,
Speed Monitor)
Port 2
(same as Port 1)
Port 3
(same as Port 1)
TPA1
TPA1#
TPB1
TPB1#
TPA2
TPA2#
TPB2
TPB2#
TPA3
TPA3#
TPB3
TPB3#
TEST
ACCESS JTAG
PORT
TPBias1
TPBias2
Bias TPBias3
R0
R1
BUILT-IN
SELF TEST
5/43
2
5 Page 
SBPH400-3
If the request for transmit comes from the local link, then the arbitration control logic waits for
an appropriate gap (all interfaces Idle), and then (unless the request is an immediate request)
arbitrates as above.
The arbitration logic supports all the arbitration enhancements specified in IEEE P1394a:-
• arbitrated reset (a short reset which is delayed until a subaction gap arbitration)
• ack-accelerated arbitration (immediate arbitration after an ACK)
• fly-by arbitration (concatenation of packets after a packet received from a child
port)
2.7 PHY packets
2.7.1 Link device interaction
The SBPH400 will forward to the link (if the PHY/Link interface is active) every PHY packet
received on the bus.
The SBPH400 will interpret every PHY packet which it receives from the local link device for
transmission on the bus (in addition to responding to every PHY packet received from the bus).
The SBPH400 will act on it in exactly the same way as if the packet was received from the bus.
2.7.2 Self-ID packet
The Self-ID packet has the following format:
Figure 2.2 Self-ID packet format
1 0 phy_ID 0 L gap_cnt
sp rsv c pwr
logical inverse of first quadlet
p0 p1 p2 i 0
11/43
2
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SBPH400-3.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SBPH400-3 | IEEE1394 3-Port 400Mbps Physical Layer | STMicroelectronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |