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74ABT244CPCのメーカーはFairchild Semiconductorです、この部品の機能は「Octal Buffer/Line Driver with 3-STATE Outputs」です。 |
部品番号 | 74ABT244CPC |
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部品説明 | Octal Buffer/Line Driver with 3-STATE Outputs | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューと74ABT244CPCダウンロード(pdfファイル)リンクがあります。 Total 10 pages
May 1992
Revised November 1999
74ABT244
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The ABT244 is an octal buffer and line driver with 3-STATE
outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver.
Features
s Non-inverting buffers
s Output sink capability of 64 mA, source capability of
32 mA
s Guaranteed output skew
s Guaranteed multiple output switching specifications
s Output switching specified for both 50 pF and 250 pF
loads
s Guaranteed simultaneous switching, noise level and
dynamic threshold performance
s Guaranteed latchup protection
s High impedance glitch free bus loading during entire
power up and power down cycle
s Nondestructive hot insertion capability
s Disable time less than enable time to avoid bus conten-
tion
Ordering Code:
Order Number Package Number
Package Description
74ABT244CSC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
74ABT244CSJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ABT244CMSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT244CMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ABT244CPC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
Description
OE1, OE2
I0–I7
O0–O7
Output Enable Input
(Active LOW)
Inputs
Outputs
Truth Table
OE1 I0–3 O0–3 OE2 I4–7 O4–7
HXZHXZ
L HH L HH
LLLLLL
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
© 1999 Fairchild Semiconductor Corporation DS010992
www.fairchildsemi.com
1 Page DC Electrical Characteristics
(SOIC package)
Conditions
Symbol
Parameter
Min Typ Max Units VCC
CL = 50 pF,
RL = 500Ω
VOLP
Quiet Output Maximum Dynamic VOL
0.5 0.8 V 5.0 TA = 25°C (Note 5)
VOLV
Quiet Output Minimum Dynamic VOL
−1.3 −0.8
V 5.0 TA = 25°C (Note 5)
VOHV
Minimum HIGH Level Dynamic Output Voltage
2.7 3.1
V 5.0 TA = 25°C (Note 7)
VIHD
Minimum HIGH Level Dynamic Input Voltage
2.0 1.5
V 5.0 TA = 25°C (Note 6)
VILD Maximum LOW Level Dynamic Input Voltage
1.1 0.8 V 5.0 TA = 25°C (Note 6)
Note 5: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 6: Max number of data inputs (n) switching. n − 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD).
Guaranteed, but not tested.
Note 7: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
AC Electrical Characteristics
(SOIC and SSOP package)
Symbol
Parameter
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
Data to Outputs
Output Enable
Time
Output Disable
Time
TA = +25°C
VCC = +5V
CL = 50 pF
Min Typ
1.0 2.5
1.0 2.3
1.5 3.5
1.5 3.6
1.7 3.5
1.7 3.3
Max
3.6
3.6
6.0
6.0
5.6
5.6
TA = −55°C to +125°C
VCC = 4.5V–5.5V
CL = 50 pF
Min Max
1.0 5.3
1.0 5.0
0.8 6.5
1.2 7.9
1.2 7.6
1.0 7.9
TA = −40°C to +85°C
VCC = 4.5V–5.5V
CL = 50 pF
Min Max
1.0 3.6
1.0 3.6
1.5 6.0
1.5 6.0
1.7 5.6
1.7 5.6
Units
ns
ns
ns
Extended AC Electrical Characteristics
(SOIC package)
TA−40°C to +85°C
TA = −40°C to +85°C TA = −40°C to +85°C
VCC = 4.5V–5.5V
VCC = 4.5V–5.5V
VCC = 4.5V–5.5V
Symbol
Parameter
CL = 50 pF
CL = 250 pF
CL = 250 pF
Units
8 Outputs Switching
1 Output Switching 8 Outputs Switching
(Note 8)
(Note 9)
(Note 10)
Min Typ Max Min Max Min Max
fTOGGLE Max Toggle Frequency
100
tPLH Propagation Delay
1.5
5.0 1.5 6.0 2.5 8.5
tPHL Data to Outputs 1.5 5.0 1.5 6.0 2.5 8.5
tPZH Output Enable Time
1.5
6.5 2.5 7.5 2.5 10.0
tPZL 1.5 6.5 2.5 7.5 2.5 12.0
tPHZ
tPLZ
Output Disable Time
1.0
1.0
5.6
(Note 11)
5.6
(Note 11)
Note 8: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
MHz
ns
ns
ns
Note 9: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11: The 3-STATE delays are dominated by the RC network (500Ω, 250 pF) on the output and have been excluded from the datasheet.
3 www.fairchildsemi.com
3Pages Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
Package Number M20B
www.fairchildsemi.com
6
6 Page | |||
ページ | 合計 : 10 ページ | ||
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部品番号 | 部品説明 | メーカ |
74ABT244CPC | Octal Buffer/Line Driver with 3-STATE Outputs | Fairchild Semiconductor |