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54ABT240J-QML の電気的特性と機能

54ABT240J-QMLのメーカーはNational Semiconductorです、この部品の機能は「Octal Buffer/Line Driver with TRI-STATE Outputs」です。


製品の詳細 ( Datasheet PDF )

部品番号 54ABT240J-QML
部品説明 Octal Buffer/Line Driver with TRI-STATE Outputs
メーカ National Semiconductor
ロゴ National Semiconductor ロゴ 




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54ABT240J-QML Datasheet, 54ABT240J-QML PDF,ピン配置, 機能
July 1998
54ABT240
Octal Buffer/Line Driver with TRI-STATE® Outputs
General Description
The ’ABT240 is an inverting octal buffer and line driver de-
signed to be employed as a memory address driver, clock
driver and bus oriented transmitter or receiver which pro-
vides improved PC board density.
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Nondestructive hot insertion capability
n Standard Microcircuit Drawing (SMD) — 5962-9318801
Features
n Output sink capability of 48 mA, source capability of
24 mA
Ordering Code
Military
54ABT240J-QML
54ABT240W-QML
54ABT240E-QML
Connection Diagrams
Package
Number
J20A
W20A
E20A
Package Description
20-Lead Ceramic Dual-In-Line
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
Pin Assignment
for DIP and Flatpak
Pin Assignment
for LCC
DS100202-1
DS100202-2
Pin Names
OE1, OE2
I0– I7
O0– O7
Description
TRI-STATE Output
Enable Inputs
Inputs
Outputs
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100202
www.national.com

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54ABT240J-QML pdf, ピン配列
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
VCC Pin Potential to
Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-Off State
in the HIGH State
−65˚C to +150˚C
−55˚C to +125˚C
−55˚C to +175˚C
−0.5V to +7.0V
−0.5V to +7.0V
−30 mA to +5.0 mA
−0.5V to 5.5V
−0.5V to VCC
DC Electrical Characteristics
Current Applied to Output
in LOW State (Max)
DC Latchup Source Current
(Across Comm Operating
Range)
Over Voltage Latchup (I/O)
twice the rated IOL (mA)
−150 mA
10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
−55˚C to +125˚C
Supply Voltage
Military
+4.5V to +5.5V
Minimum Input Edge Rate
(V/t)
Data Input
50 mV/ns
Enable Input
20 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Symbol
Parameter
VIH Input HIGH Voltage
VIL Input LOW Voltage
VCD Input Clamp Diode Voltage
VOH Output HIGH Voltage
VOL Output LOW Voltage
IIH Input HIGH Current
IBVI Input HIGH Current Breakdown Test
IIL Input LOW Current
VID Input Leakage Test
54ABT
54ABT
54ABT
ABT240
Min Typ Max
2.0
0.8
−1.2
2.5
2.0
0.55
5
5
7
−5
−5
4.75
Units
V
V
V
V
V
V
µA
µA
µA
V
IOZH
IOZL
IOS
ICEX
IZZ
ICCH
ICCL
ICCZ
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output High Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
−100
50
−50
−275
50
100
50
30
50
µA
µA
mA
µA
µA
µA
mA
µA
ICCT
Additional ICC/Input
Outputs Enabled
Outputs TRI-STATE
Outputs TRI-STATE
1.5 mA
1.5 mA
50 µA
ICCD
Dynamic ICC
(Note 4)
No Load
mA/
0.1 MHz
Note 3: For 8 bits toggling, ICCD < 0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
VCC
Min
Min
Min
Min
Max
Max
Max
0.0
0 − 5.5V
0 − 5.5V
Max
Max
0.0
Max
Max
Max
Max
Max
Conditions
Recognized HIGH Signal
Recognized LOW Signal
IIN = −18 mA
IOH = −3 mA
IOH = −24 mA
IOL = 48 mA
VIN = 2.7V (Note 4)
VIN = VCC
VIN = 7.0V
VIN = 0.5V (Note 4)
VIN = 0.0V
IID = 1.9 µA
All Other Pins Grounded
VOUT = 2.7V; OEn = 2.0V
VOUT = 0.5V; OEn = 2.0V
VOUT = 0.0V
VOUT = VCC
VOUT = 5.5V; All Others GND
All Outputs HIGH
All Outputs LOW
OEn = VCC;
All Others at VCC or Ground
VI = VCC − 2.1V
Enable Input VI = VCC − 2.1V
Data Input VI = VCC − 2.1V
All Others at VCC or Ground
Outputs Open
OEn = GND, (Note 3)
One Bit Toggling, 50% Duty Cycle
3 www.national.com


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54ABT240J-QML 電子部品, 半導体
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共有リンク

Link :


部品番号部品説明メーカ
54ABT240J-QML

Octal Buffer/Line Driver with TRI-STATE Outputs

National Semiconductor
National Semiconductor


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