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Datasheet FQA7N90M PDF ( 特性, スペック, ピン接続図 )

部品番号 FQA7N90M
部品説明 900V N-Channel MOSFET
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 
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FQA7N90M Datasheet, FQA7N90M PDF,ピン配置, 機能
FQA7N90M
900V N-Channel MOSFET
January 2002
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies..
Features
• 7A, 900V, RDS(on) = 1.8@VGS = 10 V
• Low gate charge ( typical 40 nC)
• Low Crss ( typical 17 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
G DS
TO-3P
FQA Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
D
!
G!
◀▲
!
S
FQA7N90M
900
7.0
4.4
28
± 30
780
6.4
21
4.0
210
1.69
-55 to +150
300
Typ
--
0.24
--
Max
0.59
--
40
©2002 Fairchild Semiconductor Corporation
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
Rev. A, January 2002

1 Page



FQA7N90M pdf, ピン配列
Typical Characteristics
VGS
Top : 15.0 V
101
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Bottom: 5.0 V
100
10-1
10-2
10-1
Notes :
1. 250μ s Pulse Test
2. TC = 25
100 101
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
4
3 VGS = 10V
V = 20V
GS
2
1
Note : T = 25
J
0
0 5 10 15 20
ID, Drain Current [A]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
3000
2500
2000
C
iss
Ciss = Cgs + Cgd (Cds = shorted)
C =C +C
oss ds gd
C =C
rss gd
1500
1000
500
Coss
C
rss
Notes :
1. VGS = 0 V
2. f = 1 MHz
0
10-1 100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2002 Fairchild Semiconductor Corporation
101
100
10-1
2
150
25
-55
Notes :
1. V = 50V
2. 25DS0μ s Pulse Test
468
VGS, Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
101
100
10-1
0.2
150
25
Notes :
1. V = 0V
2. 25G0Sμ s Pulse Test
0.4 0.6 0.8 1.0 1.2
V , Source-Drain voltage [V]
SD
1.4
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
V = 180V
DS
10 V = 450V
DS
VDS = 720V
8
6
4
2
Note : I = 7.0A
D
0
0 5 10 15 20 25 30 35 40 45
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, January 2002


3Pages


FQA7N90M 電子部品, 半導体
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
Same Type
as DUT
• dv/dt controlled by RG
• ISD controlled by pulse period
VDD
VGS
( Driver )
I SD
( DUT )
VDS
( DUT )
D
=
--G--a--t-e--P--u--l-s-e---W---i-d-t-h--
Gate Pulse Period
10V
IFM , Body Diode Forward Current
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
Body Diode
Forward Voltage Drop
VDD
©2002 Fairchild Semiconductor Corporation
Rev. A, January 2002

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