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Datasheet FQA70N10 PDF ( 特性, スペック, ピン接続図 )

部品番号 FQA70N10
部品説明 100V N-Channel MOSFET
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 
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FQA70N10 Datasheet, FQA70N10 PDF,ピン配置, 機能
FQA70N10
100V N-Channel MOSFET
August 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
Features
• 70A, 100V, RDS(on) = 0.023@VGS = 10 V
• Low gate charge ( typical 85 nC)
• Low Crss ( typical 150 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
G DS
TO-3P
FQA Series
D
!
"
!"
G!
"
"
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
FQA70N10
100
70
49.5
280
± 25
1300
70
21.4
6.0
214
1.43
-55 to +175
300
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
Typ
--
0.24
--
Max
0.7
--
40
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. B, August 2000

1 Page



FQA70N10 pdf, ピン配列
Typical Characteristics
V
GS
Top : 15.0 V
10.0 V
102 8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
101
100
10-1
Notes :
1. 250μs Pulse Test
2. TC = 25
100 101
V , Drain-Source Voltage [V]
DS
Figure 1. On-Region Characteristics
80
64
V = 10V
GS
48
V = 20V
GS
32
16
Note : TJ = 25
0
0 60 120 180 240 300
I , Drain Current [A]
D
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
7000
6000
5000
4000
3000
2000
1000
0
10-1
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
C
iss
Coss
Crss
Notes :
1. VGS = 0 V
2. f = 1 MHz
100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
102
101 175
25
100
10-1
2
-55
Notes :
1. VDS = 40V
2. 250μs Pulse Test
468
VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
102
101
100
175
10-1
0.2
0.4
25
Notes :
1. VGS = 0V
2. 250μs Pulse Test
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
V , Source-Drain Voltage [V]
SD
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
10 V = 50V
DS
V = 80V
DS
8
6
4
2
Note : ID = 70A
0
0 10 20 30 40 50 60 70 80 90 100
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. B, August 2000


3Pages


FQA70N10 電子部品, 半導体
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
Same Type
as DUT
• dv/dt controlled by RG
• ISD controlled by pulse period
VDD
VGS
( Driver )
I SD
( DUT )
VDS
( DUT )
D
=
--G--a--t-e--P--u--l-s-e---W---i-d-t-h--
Gate Pulse Period
10V
IFM , Body Diode Forward Current
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
Body Diode
Forward Voltage Drop
VDD
©2000 Fairchild Semiconductor International
Rev. B, August 2000

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