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FQA33N10L PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 FQA33N10L
部品説明 100V LOGIC N-Channel MOSFET
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 

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FQA33N10L Datasheet, FQA33N10L PDF,ピン配置, 機能
FQA33N10L
100V LOGIC N-Channel MOSFET
September 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as high efficiency
switching DC/DC converters, and DC motor control.
Features
• 36A, 100V, RDS(on) = 0.052@VGS = 10 V
• Low gate charge ( typical 30 nC)
• Low Crss ( typical 70 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
G DS
TO-3P
FQA Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
D
!
"
!"
G!
"
"
!
S
FQA33N10L
100
36
25.5
144
± 20
430
36
16.3
6.0
163
1.09
-55 to +175
300
Typ
--
0.24
--
Max
0.92
--
40
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. A, September 2000

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