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AD10242 の電気的特性と機能

AD10242のメーカーはAnalog Devicesです、この部品の機能は「40 MSPS MCM A/D Converter」です。


製品の詳細 ( Datasheet PDF )

部品番号 AD10242
部品説明 40 MSPS MCM A/D Converter
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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AD10242 Datasheet, AD10242 PDF,ピン配置, 機能
a Dual, 12-Bit, 40 MSPS MCM A/D Converter
with Analog Input Signal Conditioning
AD10242
FEATURES
2 Matched ADCs with Input Signal Conditioning
Selectable Bipolar Input Voltage Range
(؎0.5 V, ؎1.0 V, ؎2.0 V)
Full MIL-STD-883B Compliant
80 dB Spurious-Free Dynamic Range
Trimmed Channel-Channel Matching
APPLICATIONS
Radar Processing
Communications Receivers
FLIR Processing
Secure Communications
Any I/Q Signal Processing Application
GENERAL DESCRIPTION
The AD10242 is a complete dual signal chain solution including
on-board amplifiers, references, ADCs, and output buffering
providing unsurpassed total system performance. Each channel is
laser trimmed for gain and offset matching and provides channel-
to-channel crosstalk performance better than 80 dB. The AD10242
utilizes two each of the AD9632, OP279, and AD9042 in a cus-
tom MCM to gain space, performance, and cost advantages over
solutions previously available.
The AD10242 operates with ± 5.0 V for the analog signal condi-
tioning with a separate 5.0 V supply for the analog-to-digital
conversion. Each channel is completely independent, allowing
operation with independent encode or analog inputs. The AD10242
also offers the user a choice of analog input signal ranges to mini-
mize additional signal conditioning required for multiple functions
within a single system. The heart of the AD10242 is the AD9042,
which is designed specifically for applications requiring wide
dynamic range.
The AD10242 is manufactured on Analog Devices’
MIL-PRF-38534 MCM line and is completely qualified. Units
are packaged in a custom, cofired, ceramic 68-lead gull wing
package and specified for operation from –55°C to +125°C.
Contact the factory for additional custom options including those
that allow the user to ac couple the ADC directly, bypassing the
front end amplifier section. Also see the AD9042 data sheet for
additional details on ADC performance.
PRODUCT HIGHLIGHTS
1. Guaranteed sample rate of 40 MSPS.
2. Dynamic performance specified over entire Nyquist band;
spurious signals @ 80 dBc for –1 dBFS input signals.
3. Low power dissipation: <2 W off ± 5.0 V supplies.
4. User defined input amplitude.
5. Packaged in 68-lead ceramic leaded chip carrier.
FUNCTIONAL BLOCK DIAGRAM
AIN3
AIN2
AIN1
UNEG UCOM UPOS
AIN3
AIN2
AIN1
UPOS
UCOM
UNEG
(LSB) D0A
D1A
D2A
D3A
D4A
D5A
D6A
D7A
D8A
REV. D
OP279
AD9632
OP279
AD9632
OP279
AD9042
VREF
12
9
OUTPUT BUFFERING
TIMING
ENC ENC D9A D10A D11A
(MSB)
AD10242
OP279
AD9042
VREF
TIMING
12
OUTPUT BUFFERING
5
7
ENC
ENC
D11B (MSB)
D10B
D9B
D8B
D7B
D0B D1B D2B D3B D4B D5B D6B
(LSB)
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/461-3113
www.analog.com
© 2015 Analog Devices, Inc. All rights reserved.

1 Page





AD10242 pdf, ピン配列
AD10242–SPECIFICATIONS
Electrical Characteristics (AVCC = +5 V; AVEE = –5.0 V; DVCC = +5 V; applies to each ADC, unless otherwise noted.)
Parameter
Temp
Test
Level
Mil
Subgroup
AD10242BZ/TZ
Min Typ Max
Unit
RESOLUTION
DC ACCURACY
No Missing Codes
Offset Error
Offset Error Channel Match
Gain Error1
Gain Error Channel Match
ANALOG INPUT (AIN)
Input Voltage Range
AIN1
AIN2
AIN3
Input Resistance
AIN1
AIN2
AIN3
Input Capacitance2
Analog Input Bandwidth3
ENCODE INPUT4, 5
Logic Compatibility
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current (VINH = 5 V)
Logic “0” Current (VINL = 0 V)
Input Capacitance
SWITCHING PERFORMANCE
Maximum Conversion Rate6
Minimum Conversion Rate6
Aperture Delay (tA)
Aperture Delay Matching
Aperture Uncertainty (Jitter)
ENCODE Pulsewidth High
ENCODE Pulsewidth Low
Output Delay (tOD)
SNR7
Analog Input @ 1.2 MHz
@ 4.85 MHz
@ 9.9 MHz
@ 19.5 MHz
SINAD8
Analog Input @ 1.2 MHz
@ 4.85 MHz
@ 9.9 MHz
@ 19.5 MHz
Full
25°C
Full
Full
25°C
Full
Full
VI
I
VI
V
I
VI
V
Full
Full
Full
Full
Full
Full
25°C
Full
I
I
I
IV
IV
IV
IV
V
Full
Full
Full
Full
25°C
Full
Full
25°C
25°C
25°C
25°C
25°C
Full
25°C
25°C
Full
25°C
Full
25°C
Full
25°C
25°C
Full
25°C
Full
25°C
Full
I
I
I
I
V
VI
V
V
V
V
IV
IV
IV
V
I
II
I
II
I
II
V
I
II
I
II
I
II
1, 2, 3
1
2, 3
1
2, 3
12
12
12
12
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
12
4, 5, 6
12
12
12
12
4
5, 6
4
5, 6
4
5, 6
4
5, 6
4
5, 6
4
5, 6
12 Bits
Guaranteed
–0.5
± 0.05
+0.5 % FS
–2.0 ± 1.0 +2.0 % FS
± 0.1 %
–1.0 ± 0.5 +1.0 % FS
–1.5 ± 0.8 +1.5 % FS
± 0.1 %
± 0.5
± 1.0
±2
99 100
198 200
396 400
0 4.0
60
2.0
0
–400
TTL/CMOS
625
–300
40 50
1.0
± 2.0
1
12 10
10
10 12
68
63 66
62 66
63 65
62 65
60 63
59 62
67
62 65
61 64
60 64
60 63
58 61
58 60
V
V
V
101
202
404
7.0 pF
MHz
5.0 V
0.8 V
800 µA
µA
7.0 pF
MSPS
5 MSPS
ns
ns
ps rms
ns
41 ns
14 ns
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
–2– REV. D


3Pages


AD10242 電子部品, 半導体
PIN CONFIGURATION
68-Lead Ceramic Leaded Chip Carrier
AD10242
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
GNDA 10
GNDA 11
UPOSA 12
AVEE 13
AVCC 14
NC 15
NC 16
(LSB) D0A 17
D1A 18
D2A 19
D3A 20
D4A 21
D5A 22
D6A 23
D7A 24
D8A 25
GNDA 26
PIN 1
IDENTIFIER
AD10242
TOP VIEW
(Not to Scale)
60 GNDB
59 GNDB
58 GNDB
57 UPOSB
56 UNEGB
55 UCOMB
54 GNDB
53 GNDB
52 ENCODEB
51 ENCODEB
50 DVCC
49 D11B (MSB)
48 D10B
47 D9B
46 D8B
45 D7B
44 GNDB
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
NC = NO CONNECT
Pin No.
1
2, 5, 9–11, 26–27
3
4
6
7
8
12
13
14
15, 16, 34, 35
17–25, 31–33
28
29
30, 50
36–42, 45–49
43–44, 53–54,
58–61, 65, 68
51
52
55
56
57
62
63
64
66
67
Mnemonic
SHIELD
GNDA
UNEGA
UCOMA
AINA1
AINA2
AINA3
UPOSA
AVEE
AVCC
NC
D0A–D11A
ENCODEA
ENCODEA
DVCC
D0B–D11B
GNDB
ENCODEB
ENCODEB
UCOMB
UNEGB
UPOSB
AINB1
AINB2
AINB3
AVCC
AVEE
REV. D
PIN FUNCTION DESCRIPTIONS
Function
Internal Ground Shield between Channels.
A Channel Ground. A and B grounds should be connected as close to the device as possible.
Unipolar Negative.
Unipolar Common.
Analog Input for A Side ADC (Nominally ± 0.5 V).
Analog Input for A Side ADC (Nominally ± 1.0 V).
Analog Input for A Side ADC (Nominally ± 2.0 V).
Unipolar Positive.
Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V).
Analog Positive Supply Voltage (Nominally 5.0 V).
No Connect.
Digital Outputs for ADC A. (D0 LSB.)
ENCODE is the complement of ENCODE.
Data conversion is initiated on the rising edge of the ENCODE input.
Digital Positive Supply Voltage (Nominally 5.0 V).
Digital Outputs for ADC B. (D0 LSB.)
B Channel Ground. A and B grounds should be connected as close to the device
as possible.
Data conversion is initiated on the rising edge of the ENCODE input.
ENCODE is the complement of ENCODE.
Unipolar Common.
Unipolar Negative.
Unipolar Positive.
Analog Input for B Side ADC (Nominally ± 0.5 V).
Analog Input for B Side ADC (Nominally ± 1.0 V).
Analog Input for B Side ADC (Nominally ± 2.0 V).
Analog Positive Supply Voltage (Nominally 5.0 V).
Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V).
–5–

6 Page



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部品番号部品説明メーカ
AD10242

40 MSPS MCM A/D Converter

Analog Devices
Analog Devices


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