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PDF ADP3605 Data sheet ( Hoja de datos )

Número de pieza ADP3605
Descripción 120 mA Switched Capacitor Voltage Inverter with Regulated Output
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
120 mA Switched Capacitor
Voltage Inverter with Regulated Output
ADP3605
FEATURES
Fully Regulated Output Voltage (–3 V and Adjustable)
High Output Current: 120 mA
Output Accuracy: ؎3%
250 kHz Switching Frequency
Low Shutdown Current: 2 A Typical
Input Voltage Range from 3 V to 6 V
SO-8 and RU-14 Packages
–40؇C to +85؇C Ambient Temperature Range
APPLICATIONS
Voltage Inverters
Voltage Regulators
Computer Peripherals and Add-On Cards
Portable Instruments
Battery Powered Devices
Pagers and Radio Control Receivers
Disk Drives
Mobile Phones
FUNCTIONAL BLOCK DIAGRAM
CP+
CP
VIN
S PD
S1
ADP3605
SND
S2
DNS
S3
B
DNS
S4
VOUT
OSC
SD CLOCK
GEN
FEEDBACK
CONTROL
LOOP
VSENSE
GND
GENERAL DESCRIPTION
The ADP3605 is a 120 mA regulated output switched capacitor
voltage inverter. It provides a regulated output voltage with
minimum voltage loss and requires a minimum number of ex-
ternal components. In addition, the ADP3605 does not require
the use of an inductor.
Pin-for-pin and functionally compatible with the ADP3604, the
internal oscillator of the ADP3605 runs at 500 kHz nominal
frequency which produces an output switching frequency of
250 kHz. This allows for the use of smaller charge pump and
filter capacitors.
The ADP3605 provides an accuracy of ± 3% with a typical shut-
down current of 2 µA. It can also operate from a single positive
input voltage as low as 3 V. The ADP3605 is offered with the
regulation fixed at –3 V or adjustable via external resistors over
a –3 V to –6 V range.
VIN
+
* CIN
4.7F
*CP +
4.7F
VIN VOUT
CP+
ADP3605-3
–3.0V
* CO
+ 4.7F
CP
OFF
SD
ON
0
GND
VSENSE
*FOR BEST PERFORMANCE, 10F IS RECOMMENDED
CP : SPRAGUE, 293D475X0010B2W
CIN, CO: TOKIN, 1E475ZY5UC205F
Figure 1. Typical Application Circuit
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999

1 page




ADP3605 pdf
ADP3605
THEORY OF OPERATION
The ADP3605 uses a switched capacitor principle to generate a
negative voltage from a positive input voltage. An onboard
oscillator generates a two phase clock to control a switching
network that transfers charge between the storage capacitors.
The switches turn on and off at a 250 kHz rate, which is gener-
ated from an internal 500 kHz oscillator. The basic principle
behind the voltage inversion scheme is illustrated in Figures 11
and 12.
S1
VIN
S2
+
CP
S3
S4
VOUT
CO
Figure 11. ADP3605 Switch Configuration Charging the
Pump Capacitor
During phase one, S1 and S2 are ON, charging the pump ca-
pacitor to the input voltage. Before the next phase begins, S1
and S2 are turned OFF as well as S3 and S4 to prevent any
overlap. S3 and S4 are turned ON during the second phase (see
Figure 12) and charge stored in the pump capacitor is trans-
ferred to the output capacitor.
S1
VIN
S2
+
CP
S3
S4
VOUT
CO
Figure 12. ADP3605 Switch Configuration Charging the
Output Capacitor
During the second phase, the positive terminal of the pump
capacitor is connected to ground through variable resistance
switch, S3, and the negative terminal is connected to the out-
put, resulting in a voltage inversion at the output terminal.
The ADP3605 block diagram is shown on the front page.
APPLICATION INFORMATION
Capacitor Selection
The ADP3605’s high internal oscillator frequency permits the
use of small capacitors for both the pump and the output ca-
pacitors. For a given load current, factors affecting the output
voltage performance are:
• Pump (CP) and output (CO) capacitance.
• ESR of the CP and CO.
When selecting the capacitors, keep in mind that not all manu-
facturers guarantee capacitor ESR in the range required by the
circuit. In general, the capacitor’s ESR is inversely proportional
to its physical size, so larger capacitance values and higher volt-
age ratings tend to reduce ESR. Since the ESR is also a function
of the operating frequency, when selecting a capacitor, make
sure its value is rated at the circuit's operating frequency.
Temperature is another factor affecting capacitor performance.
Figure 13 illustrates the temperature effect on various capaci-
tors. If the circuit has to operate at temperatures significantly
different from 25°C, the capacitance and ESR values must be
carefully selected to adequately compensate for the change.
Various capacitor technologies offer improved performance over
temperature; for example, certain tantalum capacitors provide
good low-temperature ESR but at a higher cost. Table II pro-
vides the ratings for different types of capacitor technologies to
help the designer select the right capacitors for the applica-
tion. The exact values of CIN and CO are not critical. How-
ever, low ESR capacitors such as solid tantalum and multilayer
ceramic capacitors are recommended to minimize voltage loss at
high currents. Table III shows a partial list of the recommended
low ESR capacitor manufacturers.
Input Capacitor
A small 1 µF input bypass capacitor, preferably with low ESR,
such as tantalum or multilayer ceramic, is recommended to
reduce noise and supply transients and supply part of the peak
input current drawn by the ADP3605. A large capacitor is rec-
ommended if the input supply is connected to the ADP3605
through long leads, or if the pulse current drawn by the device
might affect other circuitry through supply coupling.
Output Capacitor
The output capacitor (CO) is alternately charged to the CP volt-
age when CP is switched in parallel with CO. The ESR of CO
introduces steps in the VOUT waveform whenever the charge
pump charges CO, which contributes to VOUT ripple. Thus,
ceramic or tantalum capacitors are recommended for CO to
minimize ripple on the output. Figure 14 illustrates the output
ripple voltage effect for various capacitance and ESR values.
Note that as the capacitor value increases beyond the point
where the dominant contribution to the output ripple is due to
the ESR, no significant reduction in VOUT ripple is achieved by
added capacitance. Since output current is supplied solely by
the output capacitor, CO, during one-half of the charge-pump
cycle, peak-to-peak output ripple voltage is calculated by using
the following formula.
VRIPPLE
=
2×
IL
FS × CO
+2×
IL
×
ESRCO
where: IL = Load Current
FS = 250 kHz nominal switching frequency
CO = 10 µF with an ESR of 0.15
VRIPPLE =
120 mA
+ 2 × 120 mA × 0.15 = 60 mV
2 × 250 kHz × 10 µF
Multiple smaller capacitors can be connected in parallel to yield
lower ESR and lower cost. For lighter loads, proportionally
smaller capacitors are required. To reduce high frequency
noise, bypass the output with a 0.1 µF ceramic capacitor in
parallel with the output capacitor.
REV. A
–5–

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