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ADM1485 の電気的特性と機能

ADM1485のメーカーはAnalog Devicesです、この部品の機能は「+-5 V Low Power EIA RS-485 Transceiver」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADM1485
部品説明 +-5 V Low Power EIA RS-485 Transceiver
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADM1485 Datasheet, ADM1485 PDF,ピン配置, 機能
a
FEATURES
Meets EIA RS-485 Standard
30 Mbps Data Rate
Single 5 V Supply
–7 V to +12 V Bus Common-Mode Range
High Speed, Low Power BiCMOS
Thermal Shutdown Protection
Short-Circuit Protection
Driver Propagation Delay: 10 ns
Receiver Propagation Delay: 15 ns
High-Z Outputs with Power Off
Superior Upgrade for LTC1485
APPLICATIONS
Low Power RS-485 Systems
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
5 V Low Power
EIA RS-485 Transceiver
ADM1485
FUNCTIONAL BLOCK DIAGRAM
8-Lead
ADM1485
RO R
RE
DE
DI D
VCC
B
A
GND
GENERAL DESCRIPTION
The ADM1485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus trans-
mission lines. It is designed for balanced data transmission and
complies with both RS-485 and RS-422 EIA Standards. The part
contains a differential line driver and a differential line receiver.
Both the driver and the receiver may be enabled independently.
When disabled, the outputs are three-stated.
The ADM1485 operates from a single 5 V power supply. Excessive
power dissipation caused by bus contention or by output shorting
is prevented by a thermal shutdown circuit. This feature forces
the driver output into a high impedance state if, during fault condi-
tions, a significant temperature increase is detected in the internal
driver circuitry.
Up to 32 transceivers may be connected simultaneously on a bus,
but only one driver should be enabled at any time. It is important,
therefore, that the remaining disabled drivers do not load the bus.
To ensure this, the ADM1485 driver features high output
impedance when disabled and also when powered down.
This minimizes the loading effect when the transceiver is not being
used. The high impedance driver output is maintained over the
entire common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM1485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology. All inputs and outputs contain
protection against ESD; all driver outputs feature high source
and sink current capability. An epitaxial layer is used to guard
against latch-up.
The ADM1485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at typical data rates
of 30 Mbps while low skew minimizes EMI interference.
The part is fully specified over the commercial and industrial
temperature range and is available in PDIP, SOIC, and small
MSOP packages.
REV. '
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/461-3113 © 2012 Analog Devices, Inc. All rights reserved.

1 Page





ADM1485 pdf, ピン配列
ADM1485–SPECIFICATIONS (VCC = 5 V ؎ 5%. All specifications TMIN to TMAX, unless otherwise noted.)
Parameter
DRIVER
Differential Output Voltage, VOD
VOD3
Δ|VOD| for Complementary Output States
Common-Mode Output Voltage VOC
Δ|VOD| for Complementary Output States
Output Short-Circuit Current (VOUT = High)
Output Short-Circuit Current (VOUT = Low)
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH
Logic Input Current (DE, DI)
RECEIVER
Differential Input Threshold Voltage, VTH
Input Voltage Hysteresis, ΔVTH
Input Resistance
Input Current (A, B)
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH
Logic Enable Input Current (RE)
CMOS Output Voltage Low, VOL
CMOS Output Voltage High, VOH
Short-Circuit Output Current
Three-State Output Leakage Current
POWER SUPPLY CURRENT
ICC (Outputs Enabled)
ICC (Outputs Disabled)
Specifications subject to change without notice.
Min Typ Max
5.0
2.0 5.0
1.5 5.0
1.5 5.0
0.2
3
0.2
35 250
35 250
0.8
2.0
± 1.0
–0.2
70
12
2.0
4.0
7
+0.2
1
–0.8
0.8
±1
0.4
85
± 1.0
1.0 2.2
0.6 1
Unit Test Conditions/Comments
V R = , Test Circuit 1
V VCC = 5 V, R = 50 Ω (RS-422), Test Circuit 1
V R = 27 Ω (RS-485), Test Circuit 1
V VTST = –7 V to +12 V, Test Circuit 2
V R = 27 Ω or 50 Ω, Test Circuit 1
V R = 27 Ω or 50 Ω, Test Circuit 1
V R = 27 Ω or 50 Ω
mA –7 V VO +12 V
mA –7 V VO +12 V
V
V
μA
V –7 V VCM +12 V
mV VCM = 0 V
kΩ –7 V VCM +12 V
mA VIN = +12 V
mA VIN = –7 V
V
V
μA
V IOUT = +4.0 mA
V IOUT = –4.0 mA
mA VOUT = GND or VCC
μA 0.4 V VOUT 2.4 V
mA Digital Inputs = GND or VCC
mA Digital Inputs = GND or VCC
TIMING SPECIFICATIONS (VCC = 5 V ؎ 5%. All specifications TMIN to TMAX, unless otherwise noted.)
Parameter
Min Typ Max Unit Test Conditions/Comments
DRIVER
Propagation Delay Input to Output tPLH, tPHL
Driver O/P to O/P tSKEW
Driver Rise/Fall Time tR, tF
Driver Enable to Output Valid
Driver Disable Timing
Matched Enable Switching
|tAZH –tBZL|, |tBZH –tAZL|
Matched Disable Switching
|tAHZ –tBLZ|, |tBHZ –tALZ|
RECEIVER
Propagation Delay Input to Output tPLH, tPHL
Skew |tPLH –tPHL|
Receiver Enable tEN1
Receiver Disable tEN2
Tx Pulse Width Distortion
Rx Pulse Width Distortion
2
8
10 15
15
8 15
10 25
10 25
02
02
15 30
5
5 20
5 20
1
1
ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3
ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3
ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3
ns RL = 110 Ω, CL = 50 pF, Test Circuit 4
ns RL = 110 Ω, CL = 50 pF, Test Circuit 4
ns RL = 110 Ω, CL = 50 pF, Test Circuit 4*
ns RL = 110 Ω, CL = 50 pF, Test Circuit 4*
ns CL = 15 pF, Test Circuit 5
ns CL = 15 pF, Test Circuit 5
ns CL = 15 pF, RL = 1 kΩ, Test Circuit 6
ns CL = 15 pF, RL = 1 kΩ, Test Circuit 6
ns
ns
*Guaranteed by characterization.
Specifications subject to change without notice.
–2– REV. '


3Pages


ADM1485 電子部品, 半導体
Typical Performance Characteristics–ADM1485
50
45
40
35
30
25
20
15
10
5
0
0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
OUTPUT VOLTAGE – V
TPC 1. Output Current vs. Receiver Output Low Voltage
0.40
I = 8mA
0.35
0.30
0.25
0.20
0.15
–50
–25
0 25 50 75
TEMPERATURE – ؇C
100 125
TPC 4. Receiver Output Low Voltage vs. Temperature
0
–2
–4
–6
–8
–10
–12
–14
–16
–18
3.50 3.75 4.00 4.25 4.50 4.75 5.00
OUTPUT VOLTAGE – V
TPC 2. Output Current vs. Receiver Output High Voltage
90
80
70
60
50
40
30
20
10
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
OUTPUT VOLTAGE – V
TPC 5. Output Current vs. Driver Differential
Output Voltage
4.55
4.50
I = 8mA
4.45
4.40
4.35
4.30
4.25
4.20
4.15
–50
–25
0 25 50 75
TEMPERATURE – ؇C
100 125
TPC 3. Receiver Output High Voltage vs. Temperature
2.15
2.10
2.05
2.00
1.95
1.90
–50
–25
0 25 50 75
TEMPERATURE – ؇C
100
TPC 6. Driver Differential Output
Voltage vs. Temperature, RL = 26.8 Ω
125
REV. '
–5–

6 Page



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