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ADV601 の電気的特性と機能

ADV601のメーカーはAnalog Devicesです、この部品の機能は「Low Cost Multiformat Video Codec」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADV601
部品説明 Low Cost Multiformat Video Codec
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADV601 Datasheet, ADV601 PDF,ピン配置, 機能
a
Low Cost
Multiformat Video Codec
ADV601
FEATURES
Precise Compressed Bit Rate Control
Field Independent Compression
Flexible Video Interface Supports All Common
Formats, Including CCIR-656
General Purpose 8-, 16- or 32-Bit Host Interface With
512 Deep 32-Bit FIFO
PERFORMANCE
Real-Time Compression Or Decompression of CCIR-601
And Square Pixel Video:
720 ؋ 288 @ 50 Fields/Sec — PAL
768 ؋ 288 @ 50 Fields/Sec — PAL
720 ؋ 243 @ 60 Fields/Sec — NTSC
640 ؋ 243 @ 60 Fields/Sec — NTSC
Compression Ratios from Visually Loss-Less To 350:1
Visually Loss-Less Compression At 4:1 on Natural
Images (Typical)
APPLICATIONS
Nonlinear Video Editing
Video Capture Systems
Remote CCTV Surveillance
Digital Camcorders
Broadcast Quality Video Distribution Systems
Video Insertion Equipment
Image And Video Archival Systems
Digital Video Tape
High Quality Video Teleconferencing
GENERAL DESCRIPTION
The ADV601 is a very low cost, single chip, dedicated function,
all digital CMOS VLSI device capable of supporting visually
loss-less to 350:1 real-time compression and decompression of
CCIR-601 digital video at very high image quality levels. The
chip integrates glueless video and host interfaces with on-chip
SRAM to permit low part count, system level implementations
suitable for a broad range of applications.
The ADV601 is a video encoder/decoder optimized for real-time
compression and decompression of interlaced digital video. All
features of the ADV601 are designed to yield high performance
at a breakthrough systems-level cost. Additionally, the unique
sub-band coding architecture of the ADV601 offers you many
application-specific advantages. A review of the General Theory
of Operation and Applying the ADV601 sections will help you
get the most use out of the ADV601 in any given application.
The ADV601 accepts component digital video through the
Video Interface and outputs a compressed bit stream though the
Host Interface in Encode Mode. While in Decode Mode, the
ADV601 accepts a compressed bit stream through the Host
Interface and outputs component digital video through the
Video Interface. The host accesses all of the ADV601’s control
and status registers using the Host Interface. An optional Digital
Signal Processor (DSP) may be used for calculating quantiza-
tion Bin Widths (BW) (instead of the host); the ADV601 sends
current field statistics and receives Bin Width results as a packet
I/O over the DSP serial port interface. A generic fixed-point DSP
(for instance the ADSP-2105) is more than adequate for these
calculations. Figure 1 summarizes the basic function of the part.
FUNCTIONAL BLOCK DIAGRAM
(continued on page 2)
256K X 16-BIT DRAM
(FIELD STORE)
DSP
(OPTIONAL)
DIGITAL
COMPONENT
VIDEO I/O
DIGITAL
VIDEO I/O
PORT
DRAM
MANAGER
WAVELET
FILTERS,
DECIMATOR, &
INTERPOLATOR
SERIAL
PORT
ADAPTIVE
QUANTIZER
ADV601
LOW COST, MULTIFORMAT
VIDEO CODEC
RUN
LENGTH
CODER
HUFFMAN
CODER
HOST
I/O PORT
& FIFO
HOST
ON-CHIP
TRANSFORM
BUFFER
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997

1 Page





ADV601 pdf, ピン配列
ADV601
application. The sub-band coding architecture of the ADV601
provides a number of options to stretch compression perfor-
mance. These options are outlined on in the Applying the
ADV601 section.
The DSP serial port interface (SPORT) enables performance of
Bin Width calculations on a DSP instead of the host. The ADV601
transfers current video field statistics to the DSP and receives Bin
Width data from the DSP as packet I/O through the DSP Inter-
face. A generic fixed-point DSP (i.e., the ADSP-2105 low cost,
fixed-point DSP) is more than adequate for these calculations.
INTERNAL ARCHITECTURE
The ADV601 is composed of nine blocks. Four of these blocks
are interface blocks and five are processing blocks. The interface
blocks are the Digital Video I/O Port, the Host I/O Port, exter-
nal DRAM manager, and the DSP serial I/O Port. The process-
ing blocks are the Wavelet Kernel, the On-Chip Transform
Buffer, the Programmable Quantizer, the Run Length Coder,
and the Huffman Coder.
Digital Video I/O Port
Provides a real-time uncompressed video interface to support a
broad range of component digital video formats, including “D1.”
Host I/O Port and FIFO
Carries control, status, and compressed video to and from the
host processor. A 512 position by 32-bit FIFO buffers the com-
pressed video stream between the host and the Huffman Coder.
DRAM Manager
Performs all tasks related to writing, reading, and refreshing the
external DRAM. The external host buffer DRAM is used for
reordering and buffering quantizer input and output values.
Serial Port (to Optional DSP)
Supports, during encode only, communication of wavelet statis-
tics between the Wavelet Kernel and the DSP and quantizer
control information between the DSP and the Quantizer block.
The user programmed compression ratio is also sent from the
ADV601 host interface to the DSP automatically. Note that a
host processor can be used to replace the DSP functionality in
computer applications.
Wavelet Kernel (Filters, Decimator, and Interpolator)
Gathers statistics on a per field basis and includes a block of
filters, interpolators, and decimators. The kernel calculates
forward and backward bi-orthogonal, two-dimensional, sepa-
rable wavelet transforms on horizontal scanned video data. This
block uses the internal transform buffer when performing wave-
let transforms calculated on an entire image’s data and so
eliminates any need for extremely fast external memories in
an ADV601-based design.
On-Chip Transform Buffer
Provides an internal set of SRAM for use by the wavelet trans-
form kernel. Its function is to provide enough delay line storage
to support calculation of separable two dimensional wavelet
transforms for horizontally scanned images.
Programmable Quantizer
Quantizes wavelet coefficients. Quantize controls are calculated
by the external DSP or host processor during encode operations
and de-quantize controls are extracted from the compressed bit
stream during decode. Each quantizer Bin Width is computed
by the BW calculator software to maintain a constant com-
pressed bit rate or constant quality bit rate. A Bin Width is a per
block parameter the quantizer uses when determining the num-
ber of bits to allocate to each block (sub-band).
Run Length Coder
Performs run length coding on zero data and models nonzero
data, encoding or decoding for more efficient Huffman coding.
This data coding is optimized across the sub-bands and varies
depending on the block being coded.
Huffman Coder
Performs Huffman coder and decoder functions on quantized
run-length coded coefficient values. The Huffman coder/de-
coder uses three ROM-coded Huffman tables that provide ex-
cellent performance for wavelet transformed video.
GENERAL THEORY OF OPERATION
The ADV601 processor’s compression algorithm is based on the
bi-orthogonal (7, 9) wavelet transform, and implements field
independent sub-band coding. Sub-band coders transform two-
dimensional spatial video data into spatial frequency filtered
sub-bands. The quantization and entropy encoding processes
provide the ADV601’s data compression.
The wavelet theory, on which the ADV601 is based, is a new
mathematical apparatus first explicitly introduced by Morlet and
Grossman in their works on geophysics during the mid 80s.
This theory became very popular in theoretical physics and
applied math. The late 80s and 90s have seen a dramatic growth
in wavelet applications such as signal and image processing. For
more on wavelet theory by Morlet and Grossman, see Decompo-
sition of Hardy Functions into Square Integrable Wavelets of Con-
stant Shape (journal citation listed in References section).
ENCODE
PATH
DECODE
PATH
WAVELET
KERNEL
FILTER BANK
ADAPTIVE
QUANTIZER
RUN LENGTH
CODER &
HUFFMAN
CODER
COMPRESSED
DATA
Figure 2. Encode and Decode Paths
References
For more information on the terms, techniques and underlying
principles referred to in this data sheet, you may find the follow-
ing reference texts useful. A reference text for general digital
video principles is:
Jack, K., Video Demystified: A Handbook for the Digital Engineer
(High Text Publications, 1993) ISBN 1-878707-09-4
Three reference texts for wavelet transform background infor-
mation are:
Vetterli, M., Kovacevic, J., Wavelets And Sub-band Coding
(Prentice Hall, 1995) ISBN 0-13-097080-8
Benedetto, J., Frazier, M., Wavelets: Mathematics And Applica-
tions (CRC Press, 1994) ISBN 0-8493-8271-8
Grossman, A., Morlet, J., Decomposition of Hardy Functions into
Square Integrable Wavelets of Constant Shape, Siam. J. Math.
Anal., Vol. 15, No. 4, pp 723-736, 1984
REV. 0
–3–


3Pages


ADV601 電子部品, 半導体
ADV601
LUMINANCE AND
COLOR COMPONENTS
(EACH SEPARATELY)
BLOCK
#
INDICATES
CORRESPONDING BLOCK
LETTER ON MALLAT
DIAGRAM
X 2 INDICATES DECIMATE BY TWO IN X
Y 2 INDICATES DECIMATE BY TWO IN Y
HIGH
PASS IN
X
X2
LOW
PASS IN
X
X2
STAGE 1
BLOCK
A
HIGH
PASS IN
X
X2
LOW
PASS IN
X
X2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
STAGE 2
BLOCK
B
BLOCK
C
BLOCK
D
HIGH
PASS IN
X
X2
LOW
PASS IN
X
X2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
STAGE 3
BLOCK
E
BLOCK
F
BLOCK
G
HIGH
PASS IN
X
X2
LOW
PASS IN
X
X2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
STAGE 4
BLOCK
H
BLOCK
I
BLOCK
J
HIGH
PASS IN
X
X2
LOW
PASS IN
X
X2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
HIGH
PASS IN
Y
Y2
LOW
PASS IN
Y
Y2
STAGE 5
BLOCK
K
BLOCK
L
BLOCK
M
BLOCK
N
Figure 6. Wavelet Filter Tree Structure
–6– REV. 0

6 Page



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部品番号部品説明メーカ
ADV601

Low Cost Multiformat Video Codec

Analog Devices
Analog Devices


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