|
|
PDF ADV7194 Data sheet ( Hoja de datos )
| Número de pieza | ADV7194 | |
| Descripción | Professional Extended-10 Video Encoder | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ADV7194 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
a Professional Extended-10™
Video Encoder with 54 MHz Oversampling
ADV7194
FEATURES
10-Bit Extended CCIR-656 Input Data Port
Six High-Quality 10-Bit Video DACs
10-Bit Internal Digital Video Processing
Multistandard Video Input
Multistandard Video Output
4؋ Oversampling with Internal 54 MHz PLL
Programmable Video Control Includes:
Digital Noise Reduction
Gamma Correction
Black Burst
LUMA Delay
CHROMA Delay
Multiple Luma and Chroma Filters
Luma SSAF™ (Super Sub-Alias Filter)
Average Brightness Detection
Field Counter
CGMS (Copy Generation Management System)
WSS (Wide Screen Signaling)
Closed Captioning Support
Teletext Insertion Port (PAL-WST)
2-Wire Serial MPU Interface (I2C Compatible and
Fast I2C)
Supply Voltage 5 V and 3.3 V Operation
80-Lead LQFP Package
APPLICATIONS
Professional DVD Playback Systems
PC Video/Multimedia Playback Systems
Progressive Scan Playback Systems
Professional Studio Equipment
GENERAL DESCRIPTION
The ADV7194 is part of the new generation of video encoders
from Analog Devices. The device builds on the performance of
previous video encoders and provides new features like inter-
facing progressive scan devices, digital noise reduction, gamma
correction, 4× oversampling and 54 MHz operation, average
brightness detection, black burst signal generation, chroma delay,
an additional Chroma Filter, etc.
The ADV7194 supports NTSC-M, NTSC-N (Japan), PAL N,
PAL-B/D/G/H/I and PAL-60 standards. Input standards sup-
ported include ITU-R.BT656 4:2:2 YCrCb in 8-, 10-, 16- or
20-bit format and 3× 10-bit YCrCb progressive scan format.
The ADV7194 can output composite video (CVBS), S-Video
(Y/C), Component YUV or RGB and analog progressive scan in
YPrPb format. The analog component output is also compatible
with Betacam, MII and SMPTE/EBU N10 levels, SMPTE 170M
NTSC and ITU-R.BT 470 PAL.
For more information about the ADV7194’s features refer to
Detailed Description of Features section.
SIMPLIFIED BLOCK DIAGRAM
DIGITAL
INPUT
27MHz
CLOCK
ITU–R.BT
656/601
10-BIT YCrCb
IN 4:2:2 FORMAT
VIDEO
INPUT
PROCESSING
VIDEO
SIGNAL
PROCESSING
VIDEO
OUTPUT
PROCESSING
PLL
AND
54MHz
DEMUX
AND
YCrCb-
TO-
YUV
MATRIX
COLOR CONTROL
DNR
GAMMA
CORRECTION
VBI
TELETEXT
CLOSED CAPTION
CGMS/WSS
CHROMA
LPF
SSAF
LPF
LUMA
LPF
2؋
OVERSAMPLING
OR
4؋
OVERSAMPLING
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
I2C INTERFACE
ADV7194
ANALOG
OUTPUT
COMPOSITE VIDEO
Y [S-VIDEO]
C [S-VIDEO]
RGB
YUV
YPrPb
TV SCREEN
OR
PROGRESSIVE
SCAN DISPLAY
Extended-10 is a trademark of Analog Devices, Inc. This technology combines 10-bit conversion, 10-bit digital video data processing, and 10-bit external interfacing.
SSAF is a trademark of Analog Devices Inc.
ITU-R and CCIR are used interchangeably in this document (ITU-R has replaced CCIR recommendations).
I2C is a registered trademark of Philips Corporation.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001
1 page  
ADV7194–SPECIFICATIONS
3.3 V SPECIFICATIONS1 (VAA = 3.0 V, VREF = 1.235 V, RSET1,2 = 1200 ⍀ unless otherwise noted. All specifications TMIN to TMAX2
unless otherwise noted.)
Parameter
Min Typ Max
Unit
Test Conditions
STATIC PERFORMANCE
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
10 Bits
± 1.0 LSB
± 1.0 LSB Guaranteed Monotonic
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
Input Leakage Current3
Input Leakage Current4
2
0.8
±1
6 10
1
200
V
V
µA VIN = 0.4 V or 2.4 V
pF
µA
µA
DIGITAL OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Three-State Leakage Current5
Three-State Leakage Current6
Three-State Output Capacitance
2.4
0.4
10
200
6 10
V ISOURCE = 400 µA
V ISINK = 3.2 mA
µA
µA
pF
ANALOG OUTPUTS
Output Current (Max)
Output Current (Min)
DAC-to-DAC Matching
Output Compliance, VOC
Output Impedance, ROUT
Output Capacitance, COUT
VOLTAGE REFERENCE
Reference Range7
4.125
4.33
2.16
0.4
100
6
1.235
4.625
2.5
1.4
mA
mA
%
V
kΩ
pF
V
RL = 300 Ω
RL = 600 Ω, RSET1,2 = 2400 Ω
IOUT = 0 mA
POWER REQUIREMENTS
VAA
Normal Power Mode
IDAC8
ICCT (2× Oversampling)9, 10
ICCT (4× Oversampling)9, 10
IPLL
Sleep Mode
IDAC
ICCT
3.15 3.3
3.6
29
42 54
68 86
6
0.01
85
V
mA
mA
mA
mA
µA
µA
NOTES
1All measurements are made in 4× Oversampling Mode unless otherwise specified and are guaranteed by characterization. For 2 × Oversampling Mode, the power
requirements for the ADV7194 are typically 3.0 V.
2Temperature range TMIN to TMAX: 0°C to 70°C.
3For all inputs but PAL_NTSC and ALSB.
4For PAL_NTSC and ALSB inputs.
5For all outputs but VSO/TTX/CLAMP.
6For VSO/TTX/CLAMP outputs.
7Measurement made in 2× Oversampling Mode.
8IDAC is the total current required to supply all DACs including the VREF circuitry.
9All six DACs on.
10ICCT or the circuit current, is the continuous current required to drive the digital core without I PLL.
Specifications subject to change without notice.
–4– REV. A
5 Page 
ADV7194
PIN FUNCTION DESCRIPTIONS
Pin Input/
No.
Mnemonic
Output Function
1–10
P0–P9
I
11–20
Y0/P10–Y9/P19
21, 34, 68, 79
22, 33, 43, 69,
80
23
VDD
DGND
HSYNC
24 VSYNC
25 BLANK
I
P
G
I/O
I/O
I/O
26–31, 75–78
32
35, 49, 52
36
Cb0–Cb9
TTXREQ
AGND
CLKIN
I
O
G
I
37
38, 48, 53
39
40
41
CLKOUT
VAA
SCL
SDA
SCRESET/RTC/TR
O
P
I
I/O
I
42 ALSB
44 RSET2
I
I
45 COMP 2 O
46 DAC F
O
47 DAC E
O
50 DAC D
O
51 DAC C
O
54 DAC B
O
55 DAC A
O
56 COMP 1 O
57 VREF
I/O
58 RSET1
I
59
PAL_NTSC
I
60 RESET
I
61
CSO_HSO
O
62 VSO/TTX/CLAMP I/O
63–67, 70–74 Cr0–Cr9
I
10-Bit or 8-Bit 4:2:2 Multiplexed YCrCb Pixel Port. The LSB of the input data is set up
on Pin P0 (Pin Number 1) in 10-bit input mode.
20-Bit or 16-Bit Multiplexed YCrCb Pixel Port or 1× 10-bit progressive scan input for Y data.
Digital Power Supply (3.3 V to 5 V).
Digital Ground.
HSYNC (Modes 1, 2, and 3) Control Signal. This pin may be configured to be an output
(Master Mode) or an input (Slave Mode) and accept Sync Signals.
VSYNC Control Signal. This pin may be configured as an output (Master Mode) or as an input
(Slave Mode) and accept VSYNC as a Control Signal.
Video Blanking Control Signal. This signal is optional. For further information see Verti-
cal Blanking and Data Insertion Blanking Input section.
1 × 10-Bit Progressive Scan Input Port for Cb Data.
Teletext Data Request Output Signal, used to control teletext data transfer.
Analog Ground.
TTL Clock Input. Requires a stable 27 MHz reference clock for standard operation. Alterna-
tively, a 24.5454 MHz (NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
Clock Output Pin.
Analog Power Supply (3.3 V to 5 V).
MPU Port Serial Interface Clock Input.
MPU Port Serial Data Input/Output.
Multifunctional Input: Real-Time Control (RTC) input, Timing Reset input, Subcarrier
Reset input.
TTL Address Input. This signal sets up the LSB of the MPU address.
A 1200 Ω resistor connected from this pin to AGND is used to control full-scale amplitudes
of the Video Signals from the DAC D, E, F.
Compensation Pin for DACs D, E, and F. Connect a 0.1 µF Capacitor from COMP 2 to
VAA.
S-Video C/Pr/V/RED Analog Output. This DAC is capable of providing 4.33 mA output.
S-Video Y/Pb/U/BLUE Analog Output. This DAC is capable of providing 4.33 mA output.
Composite/Y/Y/GREEN Analog Output. This DAC is capable of providing 4.33 mA output.
S-Video C/Pr/V/RED Analog Output. This DAC is capable of providing 4.33 mA output.
S-Video Y/Pb/U/BLUE Analog Output. This DAC is capable of providing 4.33 mA output.
Composite/Y/Y/GREEN Analog Output. This DAC is capable of providing 4.33 mA output.
Compensation Pin for DACs A, B, and C. Connect a 0.1 µF Capacitor from COMP 1 to
VAA.
Voltage Reference Input for DACs or Voltage Reference Output (1.235 V). An external
VREF can not be used in 4× oversampling mode.
A 1200 Ω resistor connected from this pin to AGND is used to control full-scale amplitudes
of the Video Signals from the DAC A, B, C.
Input signal to select PAL or NTSC mode of operation, pin set to Logic 1 selects PAL.
The input resets the on-chip timing generator and sets the ADV7194 into default mode
See Appendix 8 for Default Register settings.
Dual function CSO or HSO output Sync Signal at TTL level.
Multifunctional Pin. VSO Output Sync Signal at TTL level. Teletext Data Input pin.
CLAMP TTL Output Signals can be used to drive external circuitry to enable clamping
of all Video Signals.
1 × 10-Bit Progressive Scan Input Port for Cr Data.
–10–
REV. A
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADV7194.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ADV7190 | Video Encoder | Analog Devices |
| ADV7191 | Video Encoder | Analog Devices |
| ADV7192 | Video Encoder with Six 10-Bit DACs/ 54 MHz Oversampling and Progressive Scan Inputs | Analog Devices |
| ADV7194 | Professional Extended-10 Video Encoder | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |