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PDF 74LCX125FT Data sheet ( Hoja de datos )

Número de pieza 74LCX125FT
Descripción Low-Voltage Quad Bus Buffer
Fabricantes Toshiba 
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No Preview Available ! 74LCX125FT Hoja de datos, Descripción, Manual

CMOS Digital Integrated Circuits Silicon Monolithic
74LCX125FT
74LCX125FT
1. Functional Description
• Low-Voltage Quad Bus Buffer with 5-V Tolerant Inputs and Outputs
2. General
The 74LCX125FT is a high-performance CMOS quad bus buffers. Designed for use in 3.3 V systems, it achieves
high-speed operation while maintaining the CMOS low power dissipation.
The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5 V supply
environment for inputs.
This device requires the 3-state control input OE to be set high to place the output into the high impedance state.
All inputs are equipped with protection circuits against static discharge.
3. Features
(1) AEC-Q100 (Rev. H) (Note 1)
(2) Wide operating temperature range: Topr = -40 to 125
(3) Low-voltage operation: VCC = 1.65 to 3.6 V
(4) High-speed operation: tpd = 7.0 ns (max) (VCC = 3.3 ± 0.3 V)
(5) Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
(6) Power-down protection provided on all inputs and outputs
(7) Pin and function compatible with the 74 series
(74LVC/ALVC/ etc.) 125 type
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
4. Packaging
TSSOP14B
©2016 Toshiba Corporation
1
Start of commercial production
2014-07
2016-09-13
Rev.3.0

1 page




74LCX125FT pdf
74LCX125FT
11.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 )
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Input leakage current
3-state output OFF-state
leakage current
Power-OFF leakage current
Quiescent supply current
Quiescent supply current
Symbol
Test Condition
VCC (V)
Min
Max
VIH
1.65 to 2.3 VCC × 0.9
2.3 to 2.7
1.7
2.7 to 3.6
2.0
VIL
1.65 to 2.3 VCC × 0.1
2.3 to 2.7
0.7
2.7 to 3.6
0.8
VOH
VOL
IIN
IOZ
IOFF
ICC
ICC
VIN = VIH or VIL
VIN = VIH or VIL
VIN = 0 to 5.5 V
VIN = VIH or VIL
VOUT = 0 to 5.5 V
VIN/VOUT = 5.5 V
VIN = VCC or GND
VIN/VOUT = 3.6 to 5.5 V
VIH = VCC - 0.6 V
(per 1 input)
IOH = -100 µA
IOH = -4 mA
IOH = -8 mA
IOH = -12 mA
IOH = -18 mA
IOH = -24 mA
IOL = 100 µA
IOL = 4 mA
IOL = 8 mA
IOL = 12 mA
IOL = 16 mA
IOL = 24 mA
1.65 to 3.6
1.65
2.3
2.7
3.0
3.0
1.65 to 3.6
1.65
2.3
2.7
3.0
3.0
1.65 to 3.6
1.65 to 3.6
VCC - 0.2
0.9
1.55
2.0
2.2
2.0
0
1.65 to 3.6
1.65 to 3.6
2.7 to 3.6
0.2
0.65
0.9
0.6
0.6
0.75
±20.0
±20.0
40.0
40.0
±40.0
5.0
Unit
V
V
V
V
µA
µA
µA
µA
mA
11.3. AC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
Symbol Note
Test Condition
VCC (V) Min Max Unit
Propagation delay time
tPLH,tPHL
See 11.7 AC Test Circuit,
Table 11.7.1,
Fig. 11.8.1, Table 11.8.1
1.8 ± 0.15 20.0 ns
2.5 ± 0.2
7.5
2.7 6.5
3.3 ± 0.3 1.5
6.0
3-state output enable time
tPZL,tPZH
See 11.7 AC Test Circuit,
Table 11.7.1,
Fig. 11.8.2, Table 11.8.1
1.8 ± 0.15 30.0 ns
2.5 ± 0.2 15.0
2.7 8.0
3.3 ± 0.3 1.5
7.0
3-state output disable time
tPLZ,tPHZ
See 11.7 AC Test Circuit,
Table 11.7.1,
Fig. 11.8.2, Table 11.8.1
1.8 ± 0.15 28.0 ns
2.5 ± 0.2 14.0
2.7 7.0
3.3 ± 0.3 1.5
6.0
Output skew
tosLH,tosHL (Note 1)
2.7   ns
3.3 ± 0.3
1.0
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
©2016 Toshiba Corporation
5
2016-09-13
Rev.3.0

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