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Datasheet LC717A00AR PDF ( 特性, スペック, ピン接続図 )

部品番号 LC717A00AR
部品説明 Capacitance-Digital-Converter LSI
メーカ ON Semiconductor
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LC717A00AR Datasheet, LC717A00AR PDF,ピン配置, 機能
Ordering number : ENA2048B
LC717A00AR
CMOS LSI
Capacitance-Digital-Converter LSI
for Electrostatic Capacitive Touch
Sensors
http://onsemi.com
Overview
The LC717A00AR is a high-performance, low-cost capacitance-digital-converter LSI for electrostatic capacitive
touch sensor, especially focused on usability. It has 8 channels capacitance-sensor input. The built-in logic circuit can
detect the state (ON/OFF) of each input and output the result. This makes it ideal for various switch applications.
The calibration function is automatically performed by the built-in logic circuit during power activation or whenever
there are environmental changes. In addition, since initial settings of parameters, such as gain, are configured,
LC717A00AR can operate as stand-alone when the recommended switch pattern is applied.
Also, since LC717A00AR has a serial interface compatible with I2C and SPI bus, parameters can be adjusted using
external devices whenever necessary. Moreover, outputs of the 8-input capacitance data can be detected and measured
as 8-bit data.
Features
Detection system: Differential capacitance detection (Mutual capacitance type)
Input capacitance resolution: Can detect capacitance changes in the femto Farad order
Measurement interval (8 differential inputs): 18ms (Typ) (at initial configuration),
3ms (Typ) (at minimum interval configuration)
External components for measurement: Not required
Current consumption: 320μA (Typ) (VDD = 2.8V), 740μA (Typ) (VDD = 5.5V)
Supply voltage: 2.6V to 5.5V
Detection operations: Switch
Packages: VCT28
Interface: I2C * compatible bus or SPI selectable.
* I2C Bus is a trademark of Philips Corporation.
Semiconductor Components Industries, LLC, 2013
August, 2013
Ver1.0.1
D1912HKPC 20121130-S00003/71112HK 20120628-S00001/62012HKPC No.A2048-1/11

1 Page



LC717A00AR pdf, ピン配列
LC717A00AR
Continued from the previous page.
Parameter
Symbol
Conditions
SDA pin leak current
Pin leak current
VOL I2C
ILEAK
SDA Low output
(IOL = -3mA)
Current consumption
IDD
When stand-alone
configuration and
non-touch
VDD = 2.8V
when stand-alone
configuration and
non-touch
VDD = 5.5V
ISTBY
During Sleep process
*1) Design-guaranteed values (not tested before shipment)
*2) Measurements conducted using the test mode in the LSI
*3) Ta = +25°C
*4) Apply to nRST, SCL, SDA, SA, SCK, SI, nCS, GAIN
*5) Apply to Cdrv, Pout0 to 7, SO, ERROR, INTOUT
*6) Apply to nRST, SCL, SDA, SA, SCK, SI, nCS, GAIN
min
typ max Unit Remarks
0.4 V
±1 μA
*6
320 390
μA *1 *3
740 900
1 μA
*3
No.A2048-3/11


3Pages


LC717A00AR 電子部品, 半導体
LC717A00AR
I2C Compatible Bus Slave Address
Selection of two kinds of addresses is possible through the SA terminal.
SA pin input
7bit Slave Address
Binary Notation
Low
0x16
00101100b (Write)
00101101b (Read)
High
0x17
00101110b (Write)
00101111b (Read)
SPI Data Timing (SPI Mode 0 / Mode 3)
8bit Slave Address
0x2C
0x2D
0x2E
0x2F
nCS
tSU;SCK tSU;NCS tHIGH tLOW
tCPH
tr tf tHD;NCS tHD;SCK
SCK
tSU;SI tHD;SI
SI
SO
Hi-Z
VALID
tCLZ
tV
fig.5
tHD;SO
VALID
tCHZ
SPI Communication Formats (Example of Mode 0)
Write format (data can be written into sequentially incremented addresses while holding nCS = L)
nCS
SCK
SI
SO
Write=L
765432107654321076543210
Register Address(N)
Hi-Z
Data written to Register Address(N) Data written to Register Address(N+1)
fig.6
Read format (data can be read from sequentially incremented addresses while holding nCS = L)
nCS
SCK
SI
SO
Read=H
76543210
Register Address(N)
Hi-Z
76543210765432107
Data read from Register Address(N) Data read from Register Address(N+1)
fig.7
No.A2048-6/11

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