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PDF S25FS512S Data sheet ( Hoja de datos )
| Número de pieza | S25FS512S | |
| Descripción | 512 Mbit / 1.8 V Serial Peripheral Interface | |
| Fabricantes | Cypress Semiconductor | |
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S25FS512S
512 Mbit, 1.8 V Serial Peripheral Interface
with Multi-I/O Flash
Features
Serial Peripheral Interface (SPI) with Multi-I/O
– SPI Clock polarity and phase modes 0 and 3
– Double Data Rate (DDR) option
– Extended Addressing – 24 or 32-bit address options
– Serial Command subset and footprint compatible with
S25FL-A, S25FL-K, S25FL-P, and S25FL-S SPI families
– Multi I/O Command subset and footprint compatible with
S25FL-P, and S25FL-S SPI families
Read
– Commands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad
I/O
– Modes: Burst Wrap, Continuous (XIP), QPI
– Serial Flash Discoverable Parameters (SFDP) and
Common Flash Interface (CFI), for configuration
information.
Program
– 256 or 512 Bytes Page Programming buffer
– Program suspend and resume
– Automatic Error Checking and Correction (ECC) – internal
hardware ECC with single bit error correction
Erase
– Hybrid sector option
– Physical set of eight 4-kbytes sectors and one
224-kbytes sector at the top or bottom of address
space with all remaining sectors of 256 kbytes
– Uniform sector option
– Uniform 256 kbyte blocks
– Erase suspend and resume
– Erase status evaluation
– 100,000 Program-Erase Cycles
– 20 Year Data Retention
Security Features
– One Time Program (OTP) array of 1024 bytes
– Block Protection:
– Status Register bits to control protection against
program or erase of a contiguous range of sectors.
– Hardware and software control options
– Advanced Sector Protection (ASP)
– Individual sector protection controlled by boot code or
password
– Option for password control of read access
Technology
– Cypress 65-nm MirrorBit Technology with Eclipse
Architecture
Supply Voltage
– 1.7 V to 2.0 V
Temperature Range / Grade
– Industrial (40 °C to +85 °C)
– Industrial Plus (40 °C to +105 °C)
– Extended (40 °C to +125 °C)
– Automotive, AEC-Q100 Grade 3 (40 °C to +85 °C)
– Automotive, AEC-Q100 Grade 2 (40 °C to +105 °C)
– Automotive, AEC-Q100 Grade 1 (40 °C to +125 °C)
Packages (all Pb-free)
– 16-lead SOIC 300 mil (SO3016)
– WSON 6x8 mm (WNH008)
– BGA-24 6 8 mm
– 5 5 ball (FAB024) footprint
– Known Good Die and Known Tested Die
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-00488 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 03, 2016
1 page  
S25FS512S
Table 1.1 Cypress SPI Families Comparison (Continued)
Parameter
Advanced Sector Protection
Auto Boot Mode
Erase Suspend/Resume
Program Suspend/Resume
Deep Power-Down Mode
Operating Temperature
FS-S
Yes
No
Yes
Yes
Yes
-40°C to +85°C / +105°C
FL-S
Yes
Yes
Yes
Yes
No
-40°C to +85°C / +105°C / +125°C
FL-K
No
No
Yes
Yes
Yes
-40°C to +85°C
Notes:
1. 256B program page option only for 128 Mb and 256 Mb density FL-S devices.
2. FL-P column indicates FL129P MIO SPI device (for 128 Mb density), FL128P does not support MIO, OTP, or 4 kB sectors.
3. 64-kB sector erase option only for 128 Mb / 256 Mb density FL-P, FL-S, and FS-S devices.
4. FL-K family devices can erase 4-kB sectors in groups of 32 kB or 64 kB.
5. Only 128 Mb/256 Mb density FL-S devices have 4-kB parameter sector option.
6. 512 Mb / 1 Gb FL-S devices support 256 kB-sector only.
7. The FS512 device does not support 64 kB-sectors.
8. Refer to individual product data sheets for further details.
FL-P
No
No
No
No
Yes
-40°C to +85°C / +105°C
1.2.2
Known Differences from Prior Generations
1.2.2.1
Error Reporting
FL-K and FL-P memories either do not have error status bits or do not set them if program or erase is attempted on a protected
sector. The FS-S and FL-S families do have error reporting status bits for program and erase operations. These can be set when
there is an internal failure to program or erase, or when there is an attempt to program or erase a protected sector. In these cases
the program or erase operation did not complete as requested by the command. The P_ERR or E_ERR bits and the WIP bit will be
set to and remain 1 in SR1V. The clear status register command must be sent to clear the errors and return the device to standby
state.
1.2.2.2
Secure Silicon Region (OTP)
The FS-S size and format (address map) of the One Time Program area is different from FL-K and FL-P generations. The method
for protecting each portion of the OTP area is different. For additional details see Secure Silicon Region (OTP) on page 65.
1.2.2.3
Configuration Register Freeze Bit
The Configuration Register 1 Freeze Bit CR1V[0], locks the state of the Block Protection bits (SR1NV[4:2] and SR1V[4:2]),
TBPARM_O bit (CR1NV[2]), and TBPROT_O bit (CR1NV[5]), as in prior generations. In the FS-S and FL-S families the Freeze Bit
also locks the state of the Configuration Register 1 BPNV_O bit (CR1NV[3]), and the Secure Silicon Region (OTP) area.
1.2.2.4
Sector Erase Commands
The command for erasing a 4-kbytes sector is supported only for use on 4-kbytes parameter sectors at the top or bottom of the FS-
S device address space.
The command for erasing an 8-kbyte area (two 4-kbytes sectors) is not supported.
The command for erasing a 32-kbyte area (eight 4-kbytes sectors) is not supported.
The 64 kbytes erase command is not supported for the 512 Mbits density FS-S device.
1.2.2.5
Deep Power-Down
A Deep Power-Down (DPD) function is supported in the FS-S family devices.
Document Number: 002-00488 Rev. *E
Page 5 of 143
5 Page 
S25FS512S
2.11 Not Connected (NC)
No device internal signal is connected to the package connector nor is there any future plan to use the connector for a signal. The
connection may safely be used for routing space for a signal on a Printed Circuit Board (PCB).
2.12 Reserved for Future Use (RFU)
No device internal signal is currently connected to the package connector but there is potential future use of the connector. It is
recommended to not use RFU connectors for PCB routing channels so that the PCB may take advantage of future enhanced
features in compatible footprint devices.
2.13 Do Not Use (DNU)
A device internal signal may be connected to the package connector. The connection may be used by Cypress for test or other
purposes and is not intended for connection to any host system signal. Any DNU signal related function will be inactive when the
signal is at VIL. The signal has an internal pull-down resistor and may be left unconnected in the host system or may be tied to VSS.
Do not use these connections for PCB signal routing channels. Do not connect any host system signal to these connections.
Document Number: 002-00488 Rev. *E
Page 11 of 143
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